Atanendu S. Mandal
Affiliations:- Central Electronics Engineering Research Institute (CEERI), Pilani
According to our database1,
Atanendu S. Mandal
authored at least 14 papers
between 2010 and 2019.
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Bibliography
2019
Correction to: Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness.
J. Electron. Test., 2019
J. Electron. Test., 2019
Novel Randomized & Biased Placement for FPGA Based Robust Random Number Generator with Enhanced Uniqueness.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
Classification of Motor Imagery EEG Signal for Navigation of Brain Controlled Drones.
Proceedings of the Intelligent Human Computer Interaction - 11th International Conference, 2019
2017
Memory Efficient VLSI Implementation of Real-Time Motion Detection System Using FPGA Platform.
J. Imaging, 2017
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017
2014
Features classification using geometrical deformation feature vector of support vector machine and active appearance algorithm for automatic facial expression recognition.
Mach. Vis. Appl., 2014
Proceedings of the 18th International Symposium on VLSI Design and Test, 2014
2012
Features classification using support vector machine for a facial expression recognition system.
J. Electronic Imaging, 2012
Power Aware Hardware Prototyping of Multiclass SVM Classifier Through Reconfiguration.
Proceedings of the 25th International Conference on VLSI Design, 2012
Proceedings of the Perception and Machine Intelligence - First Indo-Japan Conference, 2012
2011
Proceedings of the UKSim 5th European Symposium on Computer Modeling and Simulation, 2011
2010
Proceedings of the Information and Communication Technologies - International Conference, 2010