Asutosh Srivastava

According to our database1, Asutosh Srivastava authored at least 5 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
Formal Verification of Integer Multiplier Circuits Using Binary Decision Diagrams.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

2022
Dynamic Variable Ordering during Algebraic Backward Rewriting for Formal Verification of Multipliers.
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

Formal Analysis of Integer Multipliers by building Binary Decision Diagram of Adder Trees.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

2018
Impact of substrate bias and dielectrics on the performance parameters of symmetric lateral bipolar transistor on SiGe-OI for mixed signal applications.
Microelectron. J., 2018

2017
Study of substrate bias effect in Symmetric Lateral Bipolar Nano Scale Transistor on SOI for mixed signal applications.
Proceedings of the 12th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2017


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