Asuncion Perez-Pascual
Orcid: 0000-0002-6925-6878
According to our database1,
Asuncion Perez-Pascual
authored at least 22 papers
between 1999 and 2024.
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Bibliography
2024
O-City: Implementation of an Innovative Multimedia Platform for Promoting Orange Economy.
ACM Journal on Computing and Cultural Heritage, February, 2024
2018
Conceiving Extrinsic Information Transfer Charts for Stochastic Low-Density Parity-Check Decoders.
IEEE Access, 2018
2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2012
J. Signal Process. Syst., 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2009
Design and FPGA-Implementation of a High Performance Timing Recovery Loop for Broadband Communications.
J. Signal Process. Syst., 2009
Design of Power and Area Efficient Digital Down-converters for Broadband Communications Systems.
J. Signal Process. Syst., 2009
FPGA-implementation of Time-Multiplexed Multiple Constant Multiplication based on carry-save arithmetic.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
2008
J. Signal Process. Syst., 2008
2007
J. VLSI Signal Process., 2007
FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices.
IEEE Trans. Educ., 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
2005
Efficient FPGA Implementation of CORDIC Algorithm for Circular and Linear Coordinates.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
A comparison between lattice, cascade and direct form FIR filter structures by using a FPGA bit-serial distributed arithmetic implementation.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999