Assia Tria

According to our database1, Assia Tria authored at least 47 papers between 2005 and 2022.

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Bibliography

2022
Photonic power firewalls.
J. Cryptogr. Eng., 2022

2019
Time Synchronization Attack Scenarios and Analysis of Effective Self-Detection Parameters in a Distributed Industrial Wireless Sensor Network.
Proceedings of the 17th International Conference on Privacy, Security and Trust, 2019

Autonomous Detection of Synchronization Attacks in the Industrial Internet Of Things.
Proceedings of the 38th IEEE International Performance Computing and Communications Conference, 2019

2018
An Evaluation Tool for Physical Attacks.
Proceedings of the Ad-hoc, Mobile, and Wireless Networks, 2018

2016
When organized crime applies academic results: a forensic analysis of an in-card listening device.
J. Cryptogr. Eng., 2016

Modeling a node capture attack in a secure wireless sensor networks.
Proceedings of the 3rd IEEE World Forum on Internet of Things, 2016

2015
Combining Image Processing and Laser Fault Injections for Characterizing a Hardware AES.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Evidence of an information leakage between logically independent blocks.
Proceedings of the Second Workshop on Cryptography and Security in Computing Systems, 2015

SEMBA: A SEM based acquisition technique for fast invasive Hardware Trojan detection.
Proceedings of the European Conference on Circuit Theory and Design, 2015

A high efficiency hardware trojan detection technique based on fast SEM imaging.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
A Unified Formalism for Physical Attacks.
IACR Cryptol. ePrint Arch., 2014

Power supply glitch attacks: Design and evaluation of detection circuits.
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

Increasing the efficiency of laser fault injections using fast gate level reverse engineering.
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

Detecting positive voltage attacks on CMOS circuits.
Proceedings of the First Workshop on Cryptography and Security in Computing Systems, 2014

On Fault Injections in Generalized Feistel Networks.
Proceedings of the 2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2014

Voltage Glitch Attacks on Mixed-Signal Systems.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Efficiency of a glitch detector against electromagnetic fault injection.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Adjusting Laser Injections for Fully Controlled Faults.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2014

2013
Electrical modeling of the photoelectric effect induced by a pulsed laser applied to an SRAM cell.
Microelectron. Reliab., 2013

Practical measurements of data path delays for IP authentication & integrity verification.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

Power supply glitch induced faults on FPGA: An in-depth analysis of the injection mechanism.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

Frontside laser fault injection on cryptosystems - Application to the AES' last round -.
Proceedings of the 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, 2013

Fault Injection to Reverse Engineer DES-Like Cryptosystems.
Proceedings of the Foundations and Practice of Security - 6th International Symposium, 2013

Fault Model Analysis of Laser-Induced Faults in SRAM Memory Cells.
Proceedings of the 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2013

Robustness improvement of an SRAM cell against laser-induced fault injection.
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

Differential analysis of Round-Reduced AES faulty ciphertexts.
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

Power analysis methodology for secure circuits.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

Electromagnetic Glitch on the AES Round Counter.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2013

2012
Building the electrical model of the Photoelectric Laser Stimulation of a PMOS transistor in 90 nm technology.
Microelectron. Reliab., 2012

Injection of transient faults using electromagnetic pulses -Practical results on a cryptographic system-.
IACR Cryptol. ePrint Arch., 2012

Fault Round Modification Analysis of the advanced encryption standard.
Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012

A DFA on AES Based on the Entropy of Error Distributions.
Proceedings of the 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2012

Electromagnetic Transient Faults Injection on a Hardware and a Software Implementations of AES.
Proceedings of the 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2012

EM Probes Characterisation for Security Analysis.
Proceedings of the Cryptography and Security: From Theory to Applications, 2012

2011
Invasive Attacks.
Proceedings of the Encyclopedia of Cryptography and Security, 2nd Ed., 2011

Design and characterisation of an AES chip embedding countermeasures.
Int. J. Intell. Eng. Informatics, 2011

ElectroMagnetic analysis (EMA) of software AES on Java mobile phones.
Proceedings of the 2011 IEEE International Workshop on Information Forensics and Security, 2011

A side-channel and fault-attack resistant AES circuit working on duplicated complemented values.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
Experimental Fault Injection based on the Prototyping of an AES Cryptosystem.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010

How to flip a bit?
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

When Clocks Fail: On Critical Paths and Clock Faults.
Proceedings of the Smart Card Research and Advanced Application, 2010

2009
Fake Fingers in Fingerprint Recognition: Glycerin Supersedes Gelatin.
Proceedings of the Formal to Practical Security, 2009

2008
Error Detection for Borrow-Save Adders Dedicated to ECC Unit.
Proceedings of the Fifth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2008

2007
Robustness of circuits under delay-induced faults : test of AES with the PAFI tool.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

Experimental evaluation of protections against laser-induced faults and consequences on fault modeling.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Integrated Evaluation Platform for Secured Devices.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

2005
Invasive Attacks.
Proceedings of the Encyclopedia of Cryptography and Security, 2005


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