Assia Arsalane
Orcid: 0000-0002-4840-5600
According to our database1,
Assia Arsalane
authored at least 3 papers
between 2018 and 2023.
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Bibliography
2023
Efficient parallel implementation of Gaussian Mixture Model background subtraction algorithm on an embedded multi-core Digital Signal Processor.
Comput. Electr. Eng., September, 2023
2021
An efficient and scalable parallel mapping of pulse-Doppler radar signal processing chain on a multi-core DSP.
Microprocess. Microsystems, September, 2021
2018
An embedded system based on DSP platform and PCA-SVM algorithms for rapid beef meat freshness prediction and identification.
Comput. Electron. Agric., 2018