Assem S. Hussein

Orcid: 0000-0002-9360-9266

According to our database1, Assem S. Hussein authored at least 4 papers between 2014 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Efficient Hardware Realization of Convolutional Neural Networks Using Intra-Kernel Regular Pruning.
Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018

2017
On the Fault Tolerance of Stochastic Decoders.
Proceedings of the 47th IEEE International Symposium on Multiple-Valued Logic, 2017

2016
A 16-bit high-speed low-power hybrid adder.
Proceedings of the 28th International Conference on Microelectronics, 2016

2014
A 4-bit 6GS/s time-based analog-to-digital converter.
Proceedings of the 26th International Conference on Microelectronics, 2014


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