Asim J. Al-Khalili

According to our database, Asim J. Al-Khalili authored at least 66 papers between 1973 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

A finite element-guided mathematical surrogate modeling approach for assessing occupant injury trends across variations in simplified vehicular impact conditions.

P. R. Berthelson, Payam Ghassemi, J. W. Wood, G. G. Stubblefield, Asim J. Al-Khalili, M. D. Jones, Mark F. Horstemeyer, Souma Chowdhury, R. K. Prabhu

Medical Biol. Eng. Comput., 2021

2015

Design Intelligence for Interconnection Realization in Power-Managed SoCs.

Houman Zarrabi, A. J. Al-Khalili, Yvon Savaria

Proceedings of the Computational Intelligence in Digital and Network Designs and Applications, 2015

2014

Vt-conscious repeater insertion in power-managed VLSI.

Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

10 GHz throughput FinFET dual-edge triggered flip-flops.

Seyed Ebrahim Esmaeili, Asim J. Al-Khalili

Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

2013

Integrated Power and Clock Distribution Network.

Seyed Ebrahim Esmaeili, Asim J. Al-Khalili

IEEE Trans. Very Large Scale Integr. Syst., 2013

2012

Postsilicon Tuning of Standby Supply Voltage in SRAMs to Reduce Yield Losses Due to Parametric Data-Retention Failures.

Afshin Nourivand, Asim J. Al-Khalili, Yvon Savaria

IEEE Trans. Very Large Scale Integr. Syst., 2012

Low-Swing Differential Conditional Capturing Flip-Flop for LC Resonant Clock Distribution Networks.

Seyed Ebrahim Esmaeili, Asim J. Al-Khalili, Glenn E. R. Cowan

IEEE Trans. Very Large Scale Integr. Syst., 2012

High-performance low-power sensing scheme for nanoscale SRAMs.

Ali Valaee, A. J. Al-Khalili

IET Comput. Digit. Tech., 2012

Dual-edge triggered sense amplifier flip-flop utilizing an improved scheme to reduce area, power, and complexity.

Seyed Ebrahim Esmaeili, Riadul Islam, Asim J. Al-Khalili, Glenn E. R. Cowan

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Clock tree structure with reduced wire length using the matched-delay skew compensation technique.

Seyed Ebrahim Esmaeili, Ali M. Farhangi, Asim J. Al-Khalili, Glenn E. R. Cowan

Proceedings of the 25th IEEE Canadian Conference on Electrical and Computer Engineering, 2012

2011

Analysis of Resistive Open Defects in Drowsy SRAM Cells.

Afshin Nourivand, Asim J. Al-Khalili, Yvon Savaria

J. Electron. Test., 2011

SRAM read-assist scheme for high performanc low power applications.

Ali Valaee, Asim J. Al-Khalili

Proceedings of the International SoC Design Conference, 2011

Activity management in battery-powered embedded systems: A case study of ZigBee® WSN.

Houman Zarrabi, A. J. Al-Khalili, Yvon Savaria

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Repeater insertion in power-managed VLSI systems.

Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria

Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2010

Skew compensation in energy recovery clock distribution networks.

Seyed Ebrahim Esmaeili, Ali M. Farhangi, Asim J. Al-Khalili, Glenn E. R. Cowan

IET Comput. Digit. Tech., 2010

Dual-edge triggered sense amplifier flip-flop for resonant clock distribution networks.

Seyed Ebrahim Esmaeili, A. J. Al-Khalili, Glenn E. R. Cowan

IET Comput. Digit. Tech., 2010

Pattern-Driven Clock Tree Routing with Via Minimization.

Ali M. Farhangi, Asim J. Al-Khalili, Dhamin Al-Khalili

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

An interconnect-aware Dynamic Voltage Scaling scheme for DSM VLSI.

Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Estimating required driver strength in the resonant clock generator.

Seyed Ebrahim Esmaeili, Asim J. Al-Khalili, Glenn E. R. Cowan

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009

Estimation of energy performance in computing platforms.

Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria

Proceedings of the 16th IEEE International Conference on Electronics, 2009

An interconnect-aware delay model for dynamic voltage scaling in NM technologies.

Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

Dual-edge triggered energy recovery DCCER flip-flop for low energy applications.

Seyed Ebrahim Esmaeili, A. J. Al-Khalili, Glenn E. R. Cowan

Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008

Implementation of large-integer hardware multiplier in Xilinx FPGA.

Jacques Laurent Athow, Asim Jawad Al-Khalili

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2006

Zero skew differential clock distribution network.

Houman Zarrabi, Haydar Saaied, Asim J. Al-Khalili, Yvon Savaria

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A CAD Tool for Generation of Synthesizable and Scalable Square of Binary Numbers.

Asim J. Al-Khalili

Proceedings of the Fifth International Conference on Networking and the International Conference on Systems (ICN / ICONS / MCL 2006), 2006

A CAD Tool for Scalable, Variable Architecture Floating-Point Adder Generator.

A. J. Al-Khalili

Proceedings of the 2006 IEEE/ACS International Conference on Computer Systems and Applications (AICCSA 2006), 2006

2005

Simultaneous adaptive wire adjustment and local topology modification for tuning a bounded-skew clock tree.

Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Delay analysis of CMOS gates using modified logical effort model.

Adnan Kabbani, Dhamin Al-Khalili, Asim J. Al-Khalili

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

An Area-Reduced Scheme for Modulo 2n-1 Addition/Subtraction.

Shaoqiang Bi, Warren J. Gross, Wei Wang, Asim J. Al-Khalili, M. N. S. Swamy

Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

2004

Clock tree tuning using shortest paths polygon.

Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

Modulo deflation in (2ⁿ+1, 2ⁿ, 2ⁿ-1) converters.

Shaoqiang Bi, Wei Wang, Asim J. Al-Khalili

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

New modulo decomposed residue-to-binary algorithm for general moduli sets.

Shaoqiang Bi, Wei Wang, Asim J. Al-Khalili

Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

2003

Low-Power Constant-Coefficient Multiplier Generator.

Cheng-Yu Pai, Asim J. Al-Khalili, William E. Lynch

J. VLSI Signal Process., 2003

Technology-portable analytical model for DSM CMOS inverter transition-time estimation.

Adnan Kabbani, Dhamin Al-Khalili, Asim J. Al-Khalili

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Design of a 32-bit squarer - exploiting addition redundancy.

Asim J. Al-Khalili, Aiping Hu

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Adaptive wire adjustment for bounded skew Clock Distribution Network.

Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002

Quadratic deferred-merge embedding algorithm for zero skew clock distribution network.

Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili

Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2002

2001

A Low Power Approach to Floating Point Adder Design for DSP Applications.

R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili, S. Y. A. Shah

J. VLSI Signal Process., 2001

Low power floating point MAFs-a comparative study.

R. V. K. Pillai, S. Y. A. Shah, A. J. Al-Khalili, Dhamin Al-Khalili

Proceedings of the Sixth International Symposium on Signal Processing and its Applications, 2001

2000

A CAD tool for first hand CMOS circuit selection.

P. Sun, A. J. Al-Khalili, Dhamin Al-Khalili

Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

1999

Lossy Compression of Images Using Logic Minimization.

Jacob Augustine, William E. Lynch, Yuke Wang, Asim J. Al-Khalili

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

Power implications of precision limited arithmetic in floating point FIR filters.

R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Estimation of ground bounce effects on CMOS circuits.

Adnan Kabbani, A. J. Al-Khalili

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Dynamic CMOS noise immunity estimation in submicron regime.

Adnan Kabbani, A. J. Al-Khalili

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

An IEEE Compliant Floating Point MAF.

R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili

Proceedings of the VLSI: Systems on a Chip, 1999

1998

A Low Power Floating Point Accumulator.

R. V. K. Pillai, Asim J. Al-Khalili, Dhamin Al-Khalili

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

1997

Energy delay measures of barrel switch architectures for pre-alignment of floating point operands for addition.

R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili

Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997

A Low Power Approach to Floating Point Adder Design.

R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1996

Energy delay analysis of partial product reduction methods for parallel multiplier implementation.

R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili

Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

A 2D micromachined accelerometer.

H. Ahmad, Asim J. Al-Khalili, L. Landsberger, M. Kahrizi

Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1995

Design techniques for fault-tolerant systolic arrays.

Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri, Dhamin Al-Khalili

J. VLSI Signal Process., 1995

Area efficient computing structures for concurrent error detection in systolic arrays.

Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri

J. VLSI Signal Process., 1995

1992

Design Methodology for Fault-Tolerant Systolic Array Architectures.

Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri

Proceedings of the 1992 International Conference on Parallel Processing, 1992

Power estimation tool for sub-micron CMOS VLSI circuits.

F. Rouatbi, Baher Haroun, Asim J. Al-Khalili

Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

1991

Depth perception using blurring and its application in VLSI wafer probing.

R. V. Dantu, Nikitas J. Dimopoulos, Rajni V. Patel, A. J. Al-Khalili

Mach. Vis. Appl., 1991

On the Design of Optimal Fault-Tolerant Systolic Array Architecures.

Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri

Proceedings of the Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30, 1991

Area Efficient Computing Structures for Concurrent Error Detection in Systolic Architectures.

Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri

Proceedings of the International Conference on Parallel Processing, 1991

1990

A module generator for optimized CMOS buffers.

Asim J. Al-Khalili, Yong Zhu, Dhamin Al-Khalili

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

Design of optimal systolic arrays: a systematic approach.

Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri

Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, 1990

1988

An algorithm for polygon conversion to boxes for VLSI layouts.

Asim J. Al-Khalili, Dhamin Al-Khalili, K. Ammar

Integr., 1988

A micro-manipulator vision in IC Manufacturing.

Ram Dantu, Nikitas J. Dimopoulos, Rajni V. Patel, Asim J. Al-Khalili

Proceedings of the 1988 IEEE International Conference on Robotics and Automation, 1988

1985

The optimum green split of a cycle time.

Asim J. Al-Khalili

IEEE Trans. Syst. Man Cybern., 1985

A general approach to relative offset settings of traffic signals.

Asim J. Al-Khalili

IEEE Trans. Syst. Man Cybern., 1985

Urban traffic control - A general approach.

Asim J. Al-Khalili

IEEE Trans. Syst. Man Cybern., 1985

1984

An Algorithm for an Intelligent Arabic Computer Terminal.

Asim J. Al-Khalili

Int. J. Man Mach. Stud., 1984

1973

An On-Line Optimization Procedure for an Urban Traffic System.

C. J. Macleod, Asim J. Al-Khalili

Proceedings of the 5th Conference on Optimization Techniques, 1973