Asif Islam Khan
According to our database1,
Asif Islam Khan
authored at least 22 papers
between 2007 and 2024.
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Bibliography
2024
Comprehensive Time Dependent Dielectric Breakdown (TDDB) Characterization of Ferroelectric Capacitors Under Bipolar Stress Conditions.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
Design Framework for Ferroelectric Gate Stack Engineering of Vertical NAND Structures for Efficient TLC and QLC Operation.
Proceedings of the IEEE International Memory Workshop, 2024
2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Design of Ferroelectric-Metal Field-Effect Transistor for Multi-Level-Cell 3D NAND Flash.
Proceedings of the IEEE International Memory Workshop, 2023
2022
Adv. Intell. Syst., 2022
Machine Learning Assisted Statistical Variation Analysis of Ferroelectric Transistors: From Experimental Metrology to Predictive Modeling.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the Device Research Conference, 2022
2021
Proceedings of the IEEE International Memory Workshop, 2021
Experimental RF Characterization of Ferroelectric Hafnium Zirconium Oxide Material at GHz for Microwave Applications.
Proceedings of the Device Research Conference, 2021
Characterization of Drain Current Variations in FeFETs for PIM-based DNN Accelerators.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
Proceedings of the 2020 Device Research Conference, 2020
2019
Proceedings of the 19th Non-Volatile Memory Technology Symposium, 2019
Proceedings of the Device Research Conference, 2019
Ferroelectrics, Negative Capacitance and Depolarization Field: What exactly is negative capacitance?
Proceedings of the Device Research Conference, 2019
2018
Proceedings of the International Conference on Computer-Aided Design, 2018
On the Possibility of Dynamically Tuning and Collapsing the Ferroelectric Hysteresis/Memory Window in an Asymmetric DG MOS Device: A Path to a Reconfigurable Logic-Memory Device.
Proceedings of the 76th Device Research Conference, 2018
2017
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017
2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
2011
Some Basic Ternary Operations Using Toffoli Gates Along with the Cost of Implementation.
Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011
2009
Proceedings of the ISMVL 2009, 2009
2007
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007