Asif Ali Khan
Orcid: 0000-0002-5130-9855
According to our database1,
Asif Ali Khan
authored at least 36 papers
between 2012 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
Advancing Quantum Software Engineering: A Vision of Hybrid Full-Stack Iterative Model.
CoRR, 2024
The Landscape of Compute-near-memory and Compute-in-memory: A Research and Commercial Overview.
CoRR, 2024
Efficient Memory Layout for Pre-Alignment Filtering of Long DNA Reads Using Racetrack Memory.
IEEE Comput. Archit. Lett., 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024
2023
IEEE Trans. Computers, September, 2023
ROLLED: Racetrack Memory Optimized Linear Layout and Efficient Decomposition of Decision Trees.
IEEE Trans. Computers, May, 2023
CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms.
CoRR, 2023
Compression-Aware and Performance-Efficient Insertion Policies for Long-Lasting Hybrid LLCs.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
Special Session - Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications.
Proceedings of the International Conference on Compilers, 2023
Proceedings of the IEEE International Conference on Advanced Networks and Telecommunications Systems, 2023
2022
ACM Trans. Embed. Comput. Syst., November, 2022
PhD thesis, 2022
ALPHA: A Novel Algorithm-Hardware Co-Design for Accelerating DNA Seed Location Filtering.
IEEE Trans. Emerg. Top. Comput., 2022
OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
IEEE Trans. Computers, 2022
IEEE Comput. Archit. Lett., 2022
Proceedings of the DroneSE and RAPIDO '22: System Engineering for constrained embedded systems, Budapest Hungary, January 17, 2022
2021
IEEE Trans. Computers, 2021
BLOwing Trees to the Ground: Layout Optimization of Decision Trees on Racetrack Memory.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
Optimizing Tensor Contractions for Embedded Devices with Racetrack and DRAM Memories.
ACM Trans. Embed. Comput. Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
ACM Trans. Archit. Code Optim., 2020
Proc. IEEE, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
IEEE Comput. Archit. Lett., 2019
Optimizing tensor contractions for embedded devices with racetrack memory scratch-pads.
Proceedings of the 20th ACM SIGPLAN/SIGBED International Conference on Languages, 2019
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
Proceedings of the RAPIDO 2018 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2018
2016
J. Stat. Theory Appl., 2016
2012
Visual category recognition for the improved storage and retrieval performance of the CCTV camera system.
Proceedings of the 12th International Conference on Hybrid Intelligent Systems, 2012