Ashwin Shah

According to our database1, Ashwin Shah authored at least 4 papers between 1990 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1996, "For significant contributions to memory designs, architecture, and technology.".

Timeline

1990
1995
2000
2005
2010
2015
0
1
2
3
4
2
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
Curve-folded form-work for cast, compressive skeletons.
Proceedings of the Symposium on Simulation for Architecture & Urban Design, 2015

1990
A 100-MHz 64-tap FIR digital filter in 0.8- mu m BiCMOS gate array.
IEEE J. Solid State Circuits, December, 1990

High-performance BiCMOS 100 K-gate array.
IEEE J. Solid State Circuits, February, 1990

A functional silicon compiler for high speed FIR digital filters.
Proceedings of the 1990 International Conference on Acoustics, 1990


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