Ashur Rafiev

Orcid: 0000-0002-7387-5970

According to our database1, Ashur Rafiev authored at least 32 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
An Event-Driven Approach to Genotype Imputation on a Custom RISC-V Cluster.
IEEE ACM Trans. Comput. Biol. Bioinform., 2024

2023
REDRESS: Generating Compressed Models for Edge Inference Using Tsetlin Machines.
IEEE Trans. Pattern Anal. Mach. Intell., September, 2023

Event-based high throughput computing: A series of case studies on a massively parallel softcore machine.
IET Comput. Digit. Tech., January, 2023

An Event-Driven Approach To Genotype Imputation On A Custom RISC-V FPGA Cluster.
CoRR, 2023

2022
Practical Distributed Implementation of Very Large Scale Petri Net Simulations.
Trans. Petri Nets Other Model. Concurr., 2022

Synchronization in graph analysis algorithms on the Partially Ordered Event-Triggered Systems many-core architecture.
IET Comput. Digit. Tech., 2022

Non-deterministic event brokered computing.
Proceedings of the HEART 2022: International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, Tsukuba, Japan, June 9, 2022

2020
PARMA: Parallelization-Aware Run-Time Management for Energy-Efficient Many-Core Systems.
IEEE Trans. Computers, 2020

Amdahl's law in the context of heterogeneous many-core systems - a survey.
IET Comput. Digit. Tech., 2020

2018
Speedup and Power Scaling Models for Heterogeneous Many-Core Systems.
IEEE Trans. Multi Scale Comput. Syst., 2018

Model-Free Runtime Management of Concurrent Workloads for Energy-Efficient Many-Core Heterogeneous Systems.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

2017
Voltage, Throughput, Power, Reliability, and Multicore Scaling.
Computer, 2017

Modelling for Systems with Holistic Fault Tolerance.
Proceedings of the Software Engineering for Resilient Systems - 9th International Workshop, 2017

Speedup and Parallelization Models for Energy-Efficient Many-Core Systems Using Performance Counters.
Proceedings of the 2017 International Conference on High Performance Computing & Simulation, 2017

Architecting Holistic Fault Tolerance.
Proceedings of the 18th IEEE International Symposium on High Assurance Systems Engineering, 2017

Selective Abstraction for Estimating Extra-Functional Properties in Networks-on-Chips Using ArchOn Framework.
Proceedings of the 17th International Conference on Application of Concurrency to System Design, 2017

2016
Power-Aware Performance Adaptation of Concurrent Applications in Heterogeneous Many-Core Systems.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Selective abstraction and stochastic methods for scalable power modelling of heterogeneous systems.
Proceedings of the 2016 Forum on Specification and Design Languages, 2016

Challenges for Designing new Technology for Health and Wellbeing in a Complex Mental Healthcare Context.
Proceedings of the 2016 CHI Conference on Human Factors in Computing Systems, 2016

Power and Energy Normalized Speedup Models for Heterogeneous Many Core Computing.
Proceedings of the 16th International Conference on Application of Concurrency to System Design, 2016

2015
Can a kitchen teach languages? Linking theory and practice in the design of context-aware language learning environments.
Smart Learn. Environ., 2015

A Formal Specification and Prototyping Language for Multi-core System Management.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

Order Graphs and Cross-Layer Parametric Significance-Driven Modelling.
Proceedings of the 15th International Conference on Application of Concurrency to System Design, 2015

2014
ArchOn: Architecture-open Resource-driven Cross-layer Modelling Framework.
Proceedings of the International Workshop on Engineering Simulations for Cyber-Physical Systems, 2014

Studying the Interplay of Concurrency, Performance, Energy and Reliability with ArchOn - An Architecture-Open Resource-Driven Cross-Layer Modelling Framework.
Proceedings of the 14th International Conference on Application of Concurrency to System Design, 2014

2013
BinCam: Designing for Engagement with Facebook for Behavior Change.
Proceedings of the Human-Computer Interaction - INTERACT 2013, 2013

2012
Mixed Radix Reed-Muller Expansions.
IEEE Trans. Computers, 2012

2011
Mixed radix design flow for security applications.
PhD thesis, 2011

2010
Secure Design Flow for Asynchronous Multi-valued Logic Circuits.
Proceedings of the 40th IEEE International Symposium on Multiple-Valued Logic, 2010

2009
Quaternary Reed-Muller Expansions of Mixed Radix Arguments in Cryptographic Circuits.
Proceedings of the ISMVL 2009, 2009

2008
Conversion driven design of binary to mixed radix circuits.
Proceedings of the 26th International Conference on Computer Design, 2008

Automated Verification of Asynchronous Circuits Using Circuit Petri Nets.
Proceedings of the 14th IEEE International Symposium on Asynchronous Circuits and Systems, 2008


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