Ashok Vittal

According to our database1, Ashok Vittal authored at least 9 papers between 1994 and 1999.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

1999
Crosstalk in VLSI interconnections.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Modeling Crosstalk in Resistive VLSI Interconnections.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

1998
Power Distribution Synthesis for VLSI.
VLSI Design, 1998

1997
Low-power buffered clock tree design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Crosstalk reduction for VLSI.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996
Clock skew optimization for ground bounce control.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1995
Power Distribution Topology Design.
Proceedings of the 32st Conference on Design Automation, 1995

Power Optimal Buffered Clock Tree Design.
Proceedings of the 32st Conference on Design Automation, 1995

1994
Minimal Delay Interconnect Design Using Alphabetic Trees.
Proceedings of the 31st Conference on Design Automation, 1994


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