Ashish Srivastava

Orcid: 0000-0003-1439-1885

According to our database1, Ashish Srivastava authored at least 38 papers between 2002 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Optimizing routing in wireless sensor networks: leveraging pond skater and ant colony optimization algorithms.
Soft Comput., September, 2024

Enhancement in performance of cloud computing task scheduling using optimization strategies.
Clust. Comput., August, 2024

An efficacious neural network and DNA cryptography-based algorithm for preventing black hole attacks in MANET.
Soft Comput., March, 2024

Descriptive Analysis of OLSR Applicability to FANET with a Directional Antenna Based Various Propagation Models.
Wirel. Pers. Commun., February, 2024

Parallelization of the K-Means Algorithm with Applications to Big Data Clustering.
CoRR, 2024

Learning Dynamic Representations in Large Language Models for Evolving Data Streams.
Proceedings of the Pattern Recognition - 27th International Conference, 2024

2023
Internet of Low-Altitude UAVs (IoLoUA): a methodical modeling on integration of Internet of "Things" with "UAV" possibilities and tests.
Artif. Intell. Rev., March, 2023

Techniques, Answers, and Real-World UAV Implementations for Precision Farming.
Wirel. Pers. Commun., 2023

I See What You Hear: A Vision-Inspired Method to Localize Words.
Proceedings of the IEEE International Conference on Acoustics, 2023

2022
Correction to: Edge Enhancement by Noise Suppression in HSI Color Model of UAV Video with Adaptive Thresholding.
Wirel. Pers. Commun., 2022

Edge Enhancement by Noise Suppression in HSI Color Model of UAV Video with Adaptive Thresholding.
Wirel. Pers. Commun., 2022

CDF based dual transform approach for UAV video visual enhancement in RGB model.
Int. J. Syst. Assur. Eng. Manag., 2022

Real-Time Based Driver's Drowsiness and Fatigue Detection System.
Proceedings of the 2022 International Conference on Cyber Resilience (ICCR), 2022

2021
Machine learning approach for automatic diagnosis of Chlorosis in Vigna mungo leaves.
Multim. Tools Appl., 2021

VirLeafNet: Automatic analysis and viral disease diagnosis using deep-learning in <i>Vigna mungo</i> plant.
Ecol. Informatics, 2021

Future FANET with application and enabling techniques: Anatomization and sustainability issues.
Comput. Sci. Rev., 2021

NL-Augmenter: A Framework for Task-Sensitive Natural Language Augmentation.
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CoRR, 2021

2020
Role of Antenna in Flying Adhoc Networks Communication: Provocation and Open Issues.
Proceedings of the Intelligent Systems Design and Applications, 2020

2008
A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Statistical Timing Analysis: From Basic Principles to State of the Art.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007
Low-Power-Design Space Exploration Considering Process Variation Using Robust Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Computer-Aided Design for Low-Power Robust Computing in Nanoscale CMOS.
Proc. IEEE, 2007

2005
Statistical Analysis and Optimization for VLSI: Timing and Power
Series on Integrated Circuits and Systems, Springer, ISBN: 978-0-387-26528-5, 2005

Discrete Vt assignment and gate sizing using a self-snapping continuous formulation.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance.
Proceedings of the 42nd Design Automation Conference, 2005

2004
Statistical analysis of subthreshold leakage current for VLSI circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2004

Minimizing total power by simultaneous V<sub>dd</sub>/V<sub>th</sub> assignment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

A new algorithm for improved VDD assignment in low power dual VDD systems.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

A general framework for probabilistic low-power design space exploration considering process variation.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Concurrent Sizing, Vdd and Vth Assignment for Low-Power Design.
Proceedings of the 2004 Design, 2004

Power minimization using simultaneous gate sizing, dual-Vdd and dual-Vth assignment.
Proceedings of the 41th Design Automation Conference, 2004

Statistical optimization of leakage power considering process variations using dual-Vth and sizing.
Proceedings of the 41th Design Automation Conference, 2004

2003
An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Statistical estimation of leakage current considering inter- and intra-die process variation.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Pushing ASIC performance in a power envelope.
Proceedings of the 40th Design Automation Conference, 2003

Minimizing total power by simultaneous Vdd/Vth assignment.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Modeling and analysis of leakage power considering within-die process variations.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002


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