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Ashish Sachdeva

Orcid: 0000-0003-2434-5073

According to our database1, Ashish Sachdeva authored at least 12 papers between 2012 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

2012
2014
2016
2018
2020
2022
2024
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Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2025
One-Sided Schmitt-Trigger-Based Low Power Read Decoupled 11T CNTFET SRAM with Improved Stability.
[BibTeX]
[DOI]
M. Elangovan
,
Kulbhushan Sharma
,
Ashish Sachdeva
,
Abdolreza Darabi
Circuits Syst. Signal Process., February, 2025

2024
A Novel Simulation Approach for Fault Injection Mechanism Assessing Dependability of Cybersecurity Attacks.
[BibTeX]
[DOI]
Shaminder Kaur
,
Ashish Sachdeva
J. Circuits Syst. Comput., April, 2024

Read Improved and Low Leakage Power CNTFET Based Hybrid 10t SRAM Cell for Low Power Applications.
[BibTeX]
[DOI]
M. Elangovan
,
Kulbhushan Sharma
,
Ashish Sachdeva
,
Lipika Gupta
Circuits Syst. Signal Process., March, 2024

2023
Low Power Static Random-Access Memory Cell Design for Mobile Opportunistic Networks Sensor Nodes.
[BibTeX]
[DOI]
Ashish Sachdeva
J. Circuits Syst. Comput., March, 2023

2022
Design of a soft error hardened SRAM cell with improved access time for embedded systems.
[BibTeX]
[DOI]
V. K. Tomar
,
Ashish Sachdeva
Microprocess. Microsystems, April, 2022

Characterization of Stable 12T SRAM with Improved Critical Charge.
[BibTeX]
[DOI]
Ashish Sachdeva
,
V. K. Tomar
J. Circuits Syst. Comput., 2022

2021
A Multi-bit Error Upset Immune 12T SRAM Cell for 5G Satellite Communications.
[BibTeX]
[DOI]
Ashish Sachdeva
,
V. K. Tomar
Wirel. Pers. Commun., 2021

Design of Low Power Half Select Free 10T Static Random-Access Memory Cell.
[BibTeX]
[DOI]
Ashish Sachdeva
,
V. K. Tomar
J. Circuits Syst. Comput., 2021

Design of 10T SRAM cell with improved read performance and expanded write margin.
[BibTeX]
[DOI]
Ashish Sachdeva
,
V. K. Tomar
IET Circuits Devices Syst., 2021

2020
Design of a Stable Low Power 11-T Static Random Access Memory Cell.
[BibTeX]
[DOI]
Ashish Sachdeva
,
V. K. Tomar
J. Circuits Syst. Comput., 2020

2018
The path to equilibrium in sequential and simultaneous games: A mousetracking study.
[BibTeX]
[DOI]
Isabelle Brocas
,
Juan D. Carrillo
,
Ashish Sachdeva
J. Econ. Theory, 2018

2012
Analog Textual Entailment and Spectral Clustering (ATESC) Based Summarization.
[BibTeX]
[DOI]
Anand Gupta
,
Manpreet Kathuria
,
Arjun Singh
,
Ashish Sachdeva
,
Shruti Bhati
Proceedings of the Big Data Analytics, First International Conference, 2012


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