Ashish Reddy Bommana

Orcid: 0000-0001-6321-6544

According to our database1, Ashish Reddy Bommana authored at least 3 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

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Bibliography

2024
SEC-CiM: Selective Error Compensation for ReRAM-based Compute-in-Memory<sup>*</sup>.
Proceedings of the IEEE International Test Conference, 2024

2023
Design of Synthesis-time Vectorized Arithmetic Hardware for Tapered Floating-point Addition and Subtraction.
ACM Trans. Design Autom. Electr. Syst., 2023

2022
A Run-time Tapered Floating-Point Adder/Subtractor Supporting Vectorization.
Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022


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