Asadollah Shahbahrami
Orcid: 0000-0002-5195-1688
According to our database1,
Asadollah Shahbahrami
authored at least 65 papers
between 2005 and 2024.
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Bibliography
2024
Multim. Tools Appl., June, 2024
A Cost-Sensitive Machine Learning Model With Multitask Learning for Intrusion Detection in IoT.
IEEE Trans. Ind. Informatics, March, 2024
Multim. Tools Appl., January, 2024
Image Vis. Comput., 2024
2023
An edge-aided parallel evolutionary privacy-preserving algorithm for Internet of Things.
Internet Things, October, 2023
Multim. Tools Appl., September, 2023
Comput. Biol. Medicine, February, 2023
2022
IEEE Trans. Circuits Syst. Video Technol., 2022
Image Copy-Move Forgery Detection Using Combination of Scale-Invariant Feature Transform and Local Binary Pattern Features.
Int. J. Image Graph., 2022
Int. J. Image Graph., 2022
2021
Remote patient monitoring and classifying using the internet of things platform combined with cloud computing.
J. Big Data, 2021
High-performance implementation of evolutionary privacy-preserving algorithm for big data using GPU platform.
Inf. Sci., 2021
An Accurate Real-Time License Plate Detection Method Based On Deep Learning Approaches.
Int. J. Pattern Recognit. Artif. Intell., 2021
Facial expression recognition using a combination of enhanced local binary pattern and pyramid histogram of oriented gradients features extraction.
IET Image Process., 2021
IET Image Process., 2021
IET Image Process., 2021
2020
J. Parallel Distributed Comput., 2020
Privacy-preserving in association rule mining using an improved discrete binary artificial bee colony.
Expert Syst. Appl., 2020
A Robust Deep Learning Approach for Automatic Iranian Vehicle License Plate Detection and Recognition for Surveillance Systems.
IEEE Access, 2020
Proceedings of the Pattern Recognition and Artificial Intelligence, 2020
2019
J. Digit. Imaging, 2019
2018
Microprocess. Microsystems, 2018
An Efficient Implementation of Deep Convolutional Neural Networks for MRI Segmentation.
J. Digit. Imaging, 2018
Expert Syst. Appl., 2018
2017
Binary search routing equivalent (BSRE): a circular design for structured P2P networks.
Trans. Emerg. Telecommun. Technol., 2017
Optimizing association rule hiding using combination of border and heuristic approaches.
Appl. Intell., 2017
Proceedings of the 2017 International Conference on High Performance Computing & Simulation, 2017
2016
An efficient implementation of Fuzzy C-Means and watershed algorithms for MRI segmentation.
Proceedings of the 8th International Symposium on Telecommunications, 2016
2015
Int. J. Knowl. Based Intell. Eng. Syst., 2015
Proceedings of the 2015 International Conference on High Performance Computing & Simulation, 2015
2014
High performance implementation of texture features extraction algorithms using FPGA architecture.
J. Real Time Image Process., 2014
2013
2012
Parallel implementation of Gray Level Co-occurrence Matrices and Haralick texture features on cell architecture.
J. Supercomput., 2012
J. Supercomput., 2012
2011
Collaboration of reconfigurable processors in grid computing: Theory and application.
Future Gener. Comput. Syst., 2011
CoRR, 2011
Improving the performance of 2D Discrete Wavelet Transform using data-level parallelism.
Proceedings of the 2011 International Conference on High Performance Computing & Simulation, 2011
Proceedings of the Intelligent Distributed Computing V - Proceedings of the 5th International Symposium on Intelligent Distributed Computing - IDC 2011, Delft, The Netherlands, 2011
Proceedings of the Digital Information and Communication Technology and Its Applications, 2011
Proceedings of the Digital Information and Communication Technology and Its Applications, 2011
2010
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010
Proceedings of the MoMM'2010, 2010
Proceedings of the Advances in Grid and Pervasive Computing, 5th International Conference, 2010
2009
A New Approach to Implement Discrete Wavelet Transform Using Collaboration of Reconfigurable Elements.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009
SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices.
Proceedings of the Advanced Parallel Processing Technologies, 8th International Symposium, 2009
2008
PhD thesis, 2008
IEEE Trans. Multim., 2008
ACM Trans. Archit. Code Optim., 2008
Proceedings of the Tenth IEEE International Symposium on Multimedia (ISM2008), 2008
Data Locality Optimization Based on Comprehensive Knowledge of the Cache Miss Reason: A Case Study with DWT.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications, 2008
2007
Optimizing Cache Performance of the Discrete Wavelet Transform Using a Visualization Tool.
Proceedings of the Ninth IEEE International Symposium on Multimedia, 2007
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007
2006
Int. J. Parallel Program., 2006
Accelerating Color Space Conversion Using Extended Subwords and the Matrix Register File.
Proceedings of the Eigth IEEE International Symposium on Multimedia (ISM 2006), 2006
Improving the memory behavior of vertical filtering in the discrete wavelet transform.
Proceedings of the Third Conference on Computing Frontiers, 2006
Limitations of special-purpose instructions for similarity measurements in media SIMD extensions.
Proceedings of the 2006 International Conference on Compilers, 2006
2005
Proceedings of the 2005 ACM Symposium on Applied Computing (SAC), 2005
Matrix register file and extended subwords: two techniques for embedded media processors.
Proceedings of the Second Conference on Computing Frontiers, 2005
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005