Arvind Sudarsanam

According to our database, Arvind Sudarsanam authored at least 12 papers between 2002 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

Dynamically reconfigurable systolic array accelerators: A case study with extended Kalman filter and discrete wavelet transform algorithms.

Arvind Sudarsanam, Robert Collier Barnes, J. Carver, Ramachandra Kallam, Aravind Dasu

IET Comput. Digit. Tech., 2010

Memory architecture template for Fast Block Matching algorithms on FPGAs.

Shant Chandrakar, Abraham Clements, Arvind Sudarsanam, Aravind Dasu

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

2009

Analysis and Design of a Context Adaptable SAD/MSE Architecture.

Arvind Sudarsanam, Aravind Dasu, Karthik Vaithianathan

Int. J. Reconfigurable Comput., 2009

Methodology to derive context adaptable architectures for FPGAs.

Jonathan Phillips, Arvind Sudarsanam, Harikrishna Samala, Ramachandra Kallam, J. Carver, Aravind Dasu

IET Comput. Digit. Tech., 2009

PRR-PRR Dynamic Relocation.

Arvind Sudarsanam, Ramachandra Kallam, Aravind Dasu

IEEE Comput. Archit. Lett., 2009

2007

Performance of a LU decomposition on a multi-FPGA system compared to a low power commodity microprocessor system.

Thomas Hauser, Aravind Dasu, Arvind Sudarsanam, Seth Young

Scalable Comput. Pract. Exp., 2007

2006

Memory support design for LU decomposition on the starbridge hyper-computer.

Seth Young, Arvind Sudarsanam, Aravind Dasu, Thomas Hauser

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

2005

High Level - Application Analysis Techniques & Architectures - To Explore Design possibilities for Reduced Reconfiguration Area Overheads in FPGAs executing Compute Intensive Applications.

Aravind Dasu, Arvind Sudarsanam

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

A Fast and Efficient FPGA-Based Implementation for Solving a System of Linear Interval Equations.

Arvind Sudarsanam, Aravind Dasu

Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

2004

Resource Estimation and Task Scheduling for Multithreaded Reconfigurable Architectures.

Arvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan

Proceedings of the 10th International Conference on Parallel and Distributed Systems, 2004

Task Scheduling of Control-Data Flow Graphs for Reconfigurable Architectures.

Arvind Sudarsanam, Aravind Dasu, Sethuraman Panchanathan

Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

2002

Pattern Recognition Tool to Detect Reconfigurable Patterns in MPEG4 Video Processing.

Ali Akoglu, Aravind Dasu, Arvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan

Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002