Arunachalam Annamalai

According to our database1, Arunachalam Annamalai authored at least 11 papers between 2011 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of two.

Timeline

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PhD thesis 
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Links

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Bibliography

2014
A low-power instruction replay mechanism for design of resilient microprocessors.
ACM Trans. Embed. Comput. Syst., 2014

Reducing Energy per Instruction via Dynamic Resource Allocation and Voltage and Frequency Adaptation in Asymmetric Multicores.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

2013
A Study on the Use of Performance Counters to Estimate Power in Microprocessors.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

A study on polymorphing superscalar processor dynamically to improve power efficiency.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

A system-level solution for managing spatial temperature gradients in thinned 3D ICs.
Proceedings of the International Symposium on Quality Electronic Design, 2013

On dynamic polymorphing of a superscalar core for improving energy efficiency.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

An opportunistic prediction-based thread scheduling to maximize throughput/watt in AMPs.
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012
Improving performance per watt of asymmetric multi-core processors via online program phase classification and adaptive core morphing.
ACM Trans. Design Autom. Electr. Syst., 2012

Scalable Thread Scheduling in Asymmetric Multicores for Power Efficiency.
Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012

Dynamic Thread Scheduling in Asymmetric Multicores to Maximize Performance-per-Watt.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2011
Performance Per Watt Benefits of Dynamic Core Morphing in Asymmetric Multicores.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011


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