Arun Kumar Sinha
Orcid: 0000-0002-9043-6339
According to our database1,
Arun Kumar Sinha
authored at least 8 papers
between 2012 and 2024.
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Collaborative distances:
Timeline
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2024
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Bibliography
2024
Frontiers Artif. Intell., 2024
A TCAD Performance Analysis of an Inverter with 80% Non-Alignment in Gate in sub-45 nm Technology.
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024
2022
RF and Linearity Analysis of a Symmetrical Junction Non-Aligned Double Gate FET Device.
Proceedings of the International Conference on Microelectronics, 2022
Nano Design of a Symmetrical Junction Non-Aligned Double Gate FET Device with Improved Analog Figure of Merit.
Proceedings of the International Conference on Microelectronics, 2022
2017
A Self-Starting 70 mV-1 V, 65% Peak Efficient, <i>TEG</i> Energy Harvesting Chip with 5 ms Startup Time.
J. Circuits Syst. Comput., 2017
Short startup, batteryless, self-starting thermal energy harvesting chip working in full clock cycle.
IET Circuits Devices Syst., 2017
2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
2012
An evaluation of cellular population model for improving quantum-inspired evolutionary algorithm.
Proceedings of the Genetic and Evolutionary Computation Conference, 2012