Artur Pogiel

Orcid: 0000-0001-5271-1566

According to our database1, Artur Pogiel authored at least 22 papers between 2004 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Diagnosis of intermittent faults and corresponding algorithm development beyond 5nm technologies.
Proceedings of the IEEE International Test Conference, 2024

Power-Aware Test Scheduling for Memory BIST.
Proceedings of the IEEE International Test Conference, 2024

2022
LBIST for Automotive ICs With Enhanced Test Generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021
Convolutional Compaction-Based MRAM Fault Diagnosis.
Proceedings of the 26th IEEE European Test Symposium, 2021

2017
ROM fault diagnosis for O(n<sup>2</sup>) test algorithms.
Proceedings of the 22nd IEEE European Test Symposium, 2017

2014
Quality assurance in memory built-in self-test tools.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

High-Speed Serial Embedded Deterministic Test for System-on-Chip Designs.
Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2011
BIST-Based Fault Diagnosis for Read-Only Memories.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Fault Diagnosis with Orthogonal Compactors in Scan-Based Designs.
J. Electron. Test., 2011

Ring Generator: An Ultimate Linear Feedback Shift Register.
Computer, 2011

Diagnosis of Failing Scan Cells through Orthogonal Response Compaction.
Proceedings of the 16th European Test Symposium, 2011

Fault Diagnosis in Memory BIST Environment with Non-march Tests.
Proceedings of the 20th IEEE Asian Test Symposium, 2011

2010
High Volume Diagnosis in Memory BIST Based on Compressed Failure Data.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

2009
High-Speed On-Chip Event Counters for Embedded Systems.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

Fault diagnosis for embedded read-only memories.
Proceedings of the 2009 IEEE International Test Conference, 2009

2008
High Throughput Diagnosis via Compression of Failure Data in Embedded Memory BIST.
Proceedings of the 2008 IEEE International Test Conference, 2008

2007
Fault Diagnosis With Convolutional Compactors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Isolation of Failing Scan Cells through Convolutional Test Response Compaction.
J. Electron. Test., 2007

2006
Convolutional Compactors with Variable Polynomials.
Proceedings of the 11th European Test Symposium, 2006

2005
Diagnosis with convolutional compactors in presence of unknown states.
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Convolutional compaction-driven diagnosis of scan failures.
Proceedings of the 10th European Test Symposium, 2005

2004
Fault Diagnosis in Designs with Convolutional Compactors.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004


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