Artjom Jasnetski

According to our database, Artjom Jasnetski authored at least 8 papers between 2013 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

Automated software-based self-test generation for microprocessors.

Artjom Jasnetski, Raimund Ubar, Anton Tsertov

Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

High-level test data generation for software-based self-test in microprocessors.

Adeboye Stephen Oyeniran, Artjom Jasnetski, Anton Tsertov, Raimund Ubar

Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

2016

On automatic software-based self-test program generation based on high-level decision diagrams.

Artjom Jasnetski, Raimund Ubar, Anton Tsertov

Proceedings of the 17th Latin-American Test Symposium, 2016

High-level modeling and testing of multiple control faults in digital systems.

Artjom Jasnetski, Stephen Adeboye Oyeniran, Anton Tsertov, Mario Schölzel, Raimund Ubar

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

2015

New Fault Models and Self-Test Generation for Microprocessors Using High-Level Decision Diagrams.

Artjom Jasnetski, Jaan Raik, Anton Tsertov, Raimund Ubar

Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

2014

Software-based self-test generation for microprocessors with high-level decision diagrams.

Raimund Ubar, Anton Tsertov, Artjom Jasnetski, Marina Brik

Proceedings of the 15th Latin American Test Workshop, 2014

Laboratory framework TEAM for investigating the dependability issues of microprocessor systems.

Artjom Jasnetski, Raimund Ubar, Anton Tsertov, Helena Kruus

Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014

2013

On in-system programming of non-volatile memories.

Anton Tsertov, Sergei Devadze, Artur Jutman, Artjom Jasnetski

Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013