Arti Noor

According to our database, Arti Noor authored at least 4 papers between 1998 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

CMOS Low Power Cell Library For Digital Design.

Kanika Kaur, Arti Noor

CoRR, 2013

CPL-Adiabatic Gated logic (CPLAG) XOR gate.

Manoj Sharma, Arti Noor

Proceedings of the International Conference on Advances in Computing, 2013

2009

An Area and Power Efficient Design of Single Edge Triggered D-Flip Flop.

Manoj Sharma, Arti Noor, Satish Chandra Tiwari, Kunwar Singh

Proceedings of the ARTCom 2009, 2009

1998

Evolution of Architectural Concepts and Design Methods of Microprocessors.

S. Srivastava, S. C. Bose, B. P. Mathur, Arti Noor, Raj Singh, A. S. Mandal, K. Prabhakaran, Arindam Karmakar, Chandra Shekhar, Sudhir Kumar, Amit K. Agarwal

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998