Artem Perepelitsyn

Orcid: 0000-0002-5463-7889

According to our database1, Artem Perepelitsyn authored at least 12 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
Hardware-Based Implementation of Algorithms for Data Replacement in Cache Memory of Processor Cores.
Comput., July, 2024

2023
Method of Repairing Accumulators of Portable Electronics Under Limited Resources.
Proceedings of the 13th International Conference on Dependable Systems, 2023

Technologies and Services of Communication for Embedded Systems over Internet.
Proceedings of the 13th International Conference on Dependable Systems, 2023

Analysis of Ways of Digital Rights Management for FPGA-as-a-Service for AI-Based Solutions.
Proceedings of the 13th International Conference on Dependable Systems, 2023

2022
Technologies of FPGA-based projects Development Under Ever-changing Conditions, Platform Constraints, and Time-to-Market Pressure.
Proceedings of the 12th International Conference on Dependable Systems, 2022

Technological Stack for Implementation of AI as a Service based on Hardware Accelerators.
Proceedings of the 12th International Conference on Dependable Systems, 2022

Technologies of Embedded Systems Prototyping using Reconfigurable Nodes: Technical Solutions.
Proceedings of the 12th International Conference on Dependable Systems, 2022

2020
FPGA as a Service Solutions Development Strategy.
Proceedings of the 11th IEEE International Conference on Dependable Systems, 2020

2018
Markov Model of FPGA Resources as a Service Considering Hardware Failures.
Proceedings of the PhD Symposium at 14th International Conference on ICT in Education, 2018

2014
Wide parameterization of FPGA projects: Educational and research aspects.
Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014

2013
FPGA technologies in medical equipment: Electrical impedance tomography.
Proceedings of the East-West Design & Test Symposium, 2013

2010
Parameterized IP Infrastructures for fault-tolerant FPGA-based systems: Development, assessment, case-study.
Proceedings of the 2010 East-West Design & Test Symposium, 2010


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