Arpan Thakkar

Orcid: 0000-0003-4775-4750

According to our database1, Arpan Thakkar authored at least 6 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A 5.4-7.4 GHz Ultra-Low Jitter Injection-Locked Frequency Tripler With 3rd Harmonic Current Boosting Input Buffer.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2024

2023
A 17 GHz Output PLL-Based Frequency Doubler with -60dBc Fundamental Spur.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2022
A Class-C Injection-Locked Tripler with 48 dB Sub-Harmonic Suppression and 15 fs Additive RMS Jitter in 0.13μm BiCMOS Process.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2019
Techniques for Improved Continuous and Discrete Tuning Range in Millimeter-Wave VCOs.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2018
Phase Noise Analysis of Bipolar Class-C VCOs With Delay in Oscillator Loop.
IEEE Trans. Very Large Scale Integr. Syst., 2018

A 27.2GHz bipolar LC-VCO using class-C biasing to maximize achievable F<sub>osc</sub> in 130nm BiCMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018


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