Arnoud P. van der Wel
Orcid: 0000-0002-9417-8533
According to our database1,
Arnoud P. van der Wel
authored at least 10 papers
between 1999 and 2020.
Collaborative distances:
Collaborative distances:
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Bibliography
2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
2017
IEEE J. Solid State Circuits, 2017
2016
A microcontroller with 96% power-conversion efficiency using stacked voltage domains.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
2015
Proceedings of the 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, 2015
2012
A 1.2-6 Gb/s, 4.2 pJ/Bit Clock & Data Recovery Circuit With High Jitter Tolerance in 0.14 µm CMOS.
IEEE J. Solid State Circuits, 2012
2011
A 1.2-6 Gb/s, 4.2 pJ/bit Clock & Data Recovery circuit with high jitter tolerance in 0.14μm CMOS.
Proceedings of the 37th European Solid-State Circuits Conference, 2011
2007
IEEE J. Solid State Circuits, 2007
2004
IEEE J. Solid State Circuits, 2004
2000
IEEE J. Solid State Circuits, 2000
1999
Intrinsic 1/f device noise reduction and its effect on phase noise in CMOS ring oscillators.
IEEE J. Solid State Circuits, 1999