Arne Heittmann
According to our database1,
Arne Heittmann
authored at least 19 papers
between 2002 and 2024.
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Bibliography
2024
Memristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machines.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2018
Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017
2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Analysis of the area-delay performance of hybrid nanoelectronic memory cores used in field programmable gate arrays.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
Variability evaluation of feedback circuits used in nanoelectronic Memristive/CMOS circuits.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
Modeling variability and irreproducibility of nanoelectronic resistive switches for circuit simulation.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012
Limits of writing multivalued resistances in passive nanoelectronic crossbars used in neuromorphic circuits.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012
Proceedings of the 20th European Symposium on Artificial Neural Networks, 2012
2011
Sensitivity of neuromorphic circuits using nanoelectronic resistive switches to pulse synchronization.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
2007
IEEE Trans. Neural Networks, 2007
2005
IEEE Des. Test Comput., 2005
2004
Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation.
Proceedings of the Image Processing: Algorithms and Systems III, 2004
Proceedings of the ARCS 2004, 2004
2003
Proceedings of the NNSP 2003, 2003
2002
Analog implementation for networks of integrate-and-fire neurons with adaptive local connectivity.
Proceedings of the 12th IEEE Workshop on Neural Networks for Signal Processing, 2002
An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights.
Proceedings of the Artificial Neural Networks, 2002