Arnab Raha

Orcid: 0000-0002-8848-1069

Affiliations:
  • Intel Corporation, Santa Clara, CA, USA


According to our database1, Arnab Raha authored at least 80 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2024
Toward Energy-Efficient Collaborative Inference Using Multisystem Approximations.
IEEE Internet Things J., May, 2024

PArtNNer: Platform-Agnostic Adaptive Edge-Cloud DNN Partitioning for Minimizing End-to-End Latency.
ACM Trans. Embed. Comput. Syst., January, 2024

DiagNNose: Toward Error Localization in Deep Learning Hardware-Based on VTA-TVM Stack.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

Bit-by-Bit: Investigating the Vulnerabilities of Binary Neural Networks to Adversarial Bit Flipping.
Trans. Mach. Learn. Res., 2024

Enhancing Functional Safety in Automotive AMS Circuits through Unsupervised Machine Learning.
CoRR, 2024

FlexNN: A Dataflow-aware Flexible Deep Learning Accelerator for Energy-Efficient Edge Devices.
CoRR, 2024

HARVEST: Towards Efficient Sparse DNN Accelerators using Programmable Thresholds.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

RASH: Reliable Deep Learning Acceleration using Sparsity-based Hardware.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

SwiSS: Switchable Single-Sided Sparsity-based DNN Accelerators.
Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024

QNAD: Quantum Noise Injection for Adversarial Defense in Deep Neural Networks.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2024

Graph Learning-based Fault Criticality Analysis for Enhancing Functional Safety of E/E Systems.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
HIPED<sub>AP</sub>: Energy-Efficient Hardware Accelerators for Hidden Periodicity Detection.
IEEE Trans. Computers, October, 2023

Trouble-Shooting at GAN Point: Improving Functional Safety in Deep Learning Accelerators.
IEEE Trans. Computers, August, 2023

Energy-Efficient Approximate Edge Inference Systems.
ACM Trans. Embed. Comput. Syst., July, 2023

A Novel Low-Power Compression Scheme for Systolic Array-Based Deep Learning Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators.
IEEE Des. Test, April, 2023

VPU-EM: An Event-based Modeling Framework to Evaluate NPU Performance and Power Efficiency at Scale.
CoRR, 2023

Enhanced ML-Based Approach for Functional Safety Improvement in Automotive AMS Circuits.
Proceedings of the IEEE International Test Conference, 2023

2022
ENROUTE: An Entropy Aware Routing Scheme for Information-Centric Networks (ICN).
Wirel. Pers. Commun., 2022

Exploring the Design of Energy-Efficient Intermittently Powered Systems Using Reconfigurable Ferroelectric Transistors.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Special Session: Effective In-field Testing of Deep Neural Network Hardware Accelerators.
Proceedings of the 40th IEEE VLSI Test Symposium, 2022

2.4GHz, Double-Buffered, 4kb Standard-Cell-Based Register File with Low-Power Mixed-Frequency Clocking for Machine Learning Accelerators.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

SCENIC: An Area and Energy-Efficient CNN-based Hardware Accelerator for Discernable Classification of Brain Pathologies using MRI.
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

RIBoNN: Designing Robust In-Memory Binary Neural Network Accelerators.
Proceedings of the IEEE International Test Conference, 2022

Unsupervised Learning-based Early Anomaly Detection in AMS Circuits of Automotive SoCs.
Proceedings of the IEEE International Test Conference, 2022

Fault Resilience of DNN Accelerators for Compressed Sensor Inputs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2021
Improving Network Throughput by Hardware Realization of a Dynamic Content Caching Scheme for Information-Centric Networking (ICN).
Wirel. Pers. Commun., 2021

Toward Functional Safety of Systolic Array-Based Deep Learning Hardware Accelerators.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Design Considerations for Edge Neural Network Accelerators: An Industry Perspective.
Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

HIPER: Low Power, High Performance and Area-Efficient Hardware Accelerators for Hidden Periodicity Detection using Ramanujan Filter Banks.
Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

PreSyNC: Hardware realization of the Presynaptic Region of a Biologically Extensive Neuronal Circuitry.
Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

HardCompress: A Novel Hardware-based Low-power Compression Scheme for DNN Accelerators.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Special Session: Approximate TinyML Systems: Full System Approximations for Extreme Energy-Efficiency in Intelligent Edge Devices.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

2020
Approximate Memory Compression.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Embedding Approximate Nonlinear Model Predictive Control at Ultrahigh Speed and Extremely Low Power.
IEEE Trans. Control. Syst. Technol., 2020

Energy-Efficient IoT-Health Monitoring System using Approximate Computing.
Internet Things, 2020

Energy-Efficient Edge Detection using Approximate Ramanujan Sums.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

Approximate inference systems (AxIS): end-to-end approximations for energy-efficient inference at the edge.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020

IPS-CiM: Enhancing Energy Efficiency of Intermittently-Powered Systems with Compute-in-Memory.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

2019
Valley-Coupled-Spintronic Non-Volatile Memories with Compute-In-Memory Support.
CoRR, 2019

Non-volatile Logic and Memory based on Reconfigurable Ferroelectric Transistors.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

WSe2 based Valley-Coupled-Spintronic Devices for Low Power Non-Volatile Memories.
Proceedings of the Device Research Conference, 2019

Automatic Synthesis Techniques for Approximate Circuits.
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019

Approximate Systems: Synergistically Approximating Sensing, Computing, Memory, and Communication Subsystems for Energy Efficiency.
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019

2018
Approximating Beyond the Processor: Exploring Full-System Energy-Accuracy Tradeoffs in a Smart Camera System.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Designing Energy-Efficient Intermittently Powered Systems Using Spin-Hall-Effect-Based Nonvolatile SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Memory-Based Combination PUFs for Device Authentication in Embedded Systems.
IEEE Trans. Multi Scale Comput. Syst., 2018

D-PUF: An Intrinsically Reconfigurable DRAM PUF for Device Authentication and Random Number Generation.
ACM Trans. Embed. Comput. Syst., 2018

Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

2017
Energy-Efficient Reduce-and-Rank Using Input-Adaptive Approximations.
IEEE Trans. Very Large Scale Integr. Syst., 2017

qLUT: Input-Aware Quantized Table Lookup for Energy-Efficient Approximate Accelerators.
ACM Trans. Embed. Comput. Syst., 2017

Energy-Aware Memory Mapping for Hybrid FRAM-SRAM MCUs in Intermittently-Powered IoT Devices.
ACM Trans. Embed. Comput. Syst., 2017

Quality Configurable Approximate DRAM.
IEEE Trans. Computers, 2017

Synergistic Approximation of Computation and Memory Subsystems for Error-Resilient Applications.
IEEE Embed. Syst. Lett., 2017

Approximate memory compression for energy-efficiency.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

Towards Full-System Energy-Accuracy Tradeoffs: A Case Study of An Approximate Smart Camera System.
Proceedings of the 54th Annual Design Automation Conference, 2017

Ultrafast embedded explicit model predictive control for nonlinear systems.
Proceedings of the 2017 American Control Conference, 2017

2016
Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Sleep-Mode Voltage Scaling: Enabling SRAM Data Retention at Ultra-Low Power in Embedded Microcontrollers.
ACM Trans. Embed. Comput. Syst., 2016

Energy-Aware Memory Mapping for Hybrid FRAM-SRAM MCUs in IoT Edge Devices.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

D-PUF: an intrinsically reconfigurable DRAM PUF for device authentication in embedded systems.
Proceedings of the 2016 International Conference on Compilers, 2016

Energy-efficient system design for IoT devices.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
QuickRecall: A HW/SW Approach for Computing across Power Cycles in Transiently Powered Computers.
ACM J. Emerg. Technol. Comput. Syst., 2015

VIDalizer: An energy efficient video streamer.
Proceedings of the 2015 IEEE Wireless Communications and Networking Conference, 2015

Quality configurable reduce-and-rank for energy efficient approximate computing.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Quality-aware data allocation in approximate DRAM?
Proceedings of the 2015 International Conference on Compilers, 2015

2014
Trust integrated node potential aware routing for WSNs.
Int. J. Trust. Manag. Comput. Commun., 2014

A Power Efficient Video Encoder Using Reconfigurable Approximate Arithmetic Units.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

QUICKRECALL: A Low Overhead HW/SW Approach for Enabling Computations across Power Cycles in Transiently Powered Computers.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

Powering the internet of things.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

ASLAN: Synthesis of approximate sequential circuits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Hypnos: An ultra-low power sleep mode with SRAM data retention for embedded microcontrollers!
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

2012
A Simple Flood Forecasting Scheme Using Wireless Sensor Networks
CoRR, 2012

Fuzzy Logic Election of Node for Routing in WSNs.
Proceedings of the 11th IEEE International Conference on Trust, 2012

A Novel Indirect Trust Based Link State Routing Scheme Using a Robust Route Trust Method for Wireless Sensor Networks.
Proceedings of the 5th International Conference on New Technologies, 2012

An optimal sensor deployment scheme to ensure multi level coverage and connectivity in wireless sensor networks.
Proceedings of the 8th International Wireless Communications and Mobile Computing Conference, 2012

An efficient sleep protocol for lifetime enhancement in multi covered and multi connected WSNs.
Proceedings of the 2012 International Conference on Advances in Computing, 2012

A fuzzy based trustworthy route selection method using LSRP in wireless sensor networks (FTRSP).
Proceedings of the Second International Conference on Computational Science, 2012

2011
A Direct Trust dependent Link State Routing Protocol Using Route Trusts for WSNs (DTLSRP).
Wirel. Sens. Netw., 2011

Trust integrated link state routing protocol for Wireless Sensor Networks (TILSRP).
Proceedings of the Fifth IEEE International Conference on Advanced Telecommunication Systems and Networks, 2011


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