Armando Astarloa
Orcid: 0000-0002-6330-1922
According to our database1,
Armando Astarloa
authored at least 71 papers
between 2003 and 2024.
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Online presence:
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Bibliography
2024
IEEE Trans. Reliab., March, 2024
Proceedings of the 39th Conference on Design of Circuits and Integrated Systems, 2024
2023
SiliconBurmuin: A Horizon Europe propelled Neurocomputing Initiative in the Basque Country.
Proceedings of the 49th Euromicro Conference on Software Engineering and Advanced Applications, 2023
Time-Sensitive Networking to meet Hard-real Time Boundaries on Edge Intelligence Applications.
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023
2022
IEEE 802.1AS Clock Synchronization Performance Evaluation of an Integrated Wired-Wireless TSN Architecture.
IEEE Trans. Ind. Informatics, 2022
High-Performance Computing Architecture for Sample Value Processing in the Smart Grid.
IEEE Access, 2022
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
2021
A Fixed-Latency Architecture to Secure GOOSE and Sampled Value Messages in Substation Systems.
IEEE Access, 2021
2020
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
Synchronizing NTP Referenced SCADA Systems Interconnected by High-availability Networks.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
2019
IEEE Internet Things J., 2019
2018
System-on-Programmable-Chip AES-GCM implementation for wire-speed cryptography for SAS.
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018
2017
On the Utilization of System-on-Chip Platforms to Achieve Nanosecond Synchronization Accuracies in Substation Automation Systems.
IEEE Trans. Smart Grid, 2017
Microelectron. Reliab., 2017
IEEE Access, 2017
2016
Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs.
Reliab. Eng. Syst. Saf., 2016
Netw. Protoc. Algorithms, 2016
Performance Enhancement of High-Availability Seamless Redundancy (HSR) Networks Using OpenFlow.
IEEE Commun. Lett., 2016
Proceedings of the IECON 2016, 2016
2015
PRP and HSR for High Availability Networks in Power Utility Automation: A Method for Redundant Frames Discarding.
IEEE Trans. Smart Grid, 2015
Comput. Electr. Eng., 2015
FPGA based nodes for sub-microsecond synchronization of cyber-physical production systems on high availability ring networks.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
Proceedings of the 11th International Conference on Network and Service Management, 2015
2014
IEEE Trans. Ind. Informatics, 2014
Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs.
IEEE Trans. Ind. Electron., 2014
Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014
Securing IEEE 1588 messages with message authentication codes based on the KECCAK cryptographic algorithm implemented in FPGAs.
Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
2013
Proceedings of the 22nd IEEE International Symposium on Industrial Electronics, 2013
SHA-3 based Message Authentication Codes to secure IEEE 1588 synchronization systems.
Proceedings of the IECON 2013, 2013
Proceedings of the IECON 2013, 2013
Proceedings of the IECON 2013, 2013
PRP and HSR version 1 (IEC 62439-3 Ed.2), improvements and a prototype implementation.
Proceedings of the IECON 2013, 2013
Proceedings of the IECON 2013, 2013
SDR control interface: An FPGA based infrastructure for control of VPX Software Defined Radio systems.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013
2012
Robustness of different TMR granularities in shared wishbone architectures on SRAM FPGA.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
On the design of an heuristically optimized multiband spectrum sensing approach for cognitive radio systems.
Proceedings of the 17th IEEE International Workshop on Computer Aided Modeling and Design of Communication Links and Networks, 2012
2011
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
An automatic experimental set-up for robustness analysis of designs implemented on SRAM FPGAS.
Proceedings of the 2011 International Symposium on System on Chip, 2011
2010
Image Vis. Comput., 2010
Int. J. Reconfigurable Comput., 2010
Proceedings of the Trends in Applied Intelligent Systems, 2010
2009
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009
DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus.
Proceedings of the 29th IEEE International Conference on Distributed Computing Systems Workshops (ICDCS 2009 Workshops), 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications.
Proceedings of the Reconfigurable Computing: Architectures, 2009
2008
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008
Proceedings of the Autonomic and Trusted Computing, 5th International Conference, 2008
2007
IEEE Trans. Veh. Technol., 2007
J. Syst. Archit., 2007
Neurocomputing, 2007
2006
Proceedings of the Second International Conference on Wireless and Mobile Communications (ICWMC'06), 2006
Proceedings of the Information Systems Security, Second International Conference, 2006
2005
Implementation of a modified Fuzzy C-Means clustering algorithm for real-time applications.
Microprocess. Microsystems, 2005
Microprocess. Microsystems, 2005
2004
Co-simulation Virtual Platform for Reconfigurable Multiprocessor Hybrid Cores Development.
Proceedings of the International Conference on Modeling, 2004
Proceedings of the Field Programmable Logic and Application, 2004
Simulation Platform for Architectural Verification and Performance Analysis in Core-Based SoC Design.
Proceedings of the Field Programmable Logic and Application, 2004
Proceedings of the Field Programmable Logic and Application, 2004
2003
Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003