Arman Kazemi
Orcid: 0000-0002-2009-5516
According to our database1,
Arman Kazemi
authored at least 17 papers
between 2018 and 2024.
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Bibliography
2024
Super Efficient Neural Network for Compression Artifacts Reduction and Super Resolution.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision Workshops, 2024
2023
IEEE Trans. Circuits Syst. I Regul. Pap., 2023
2022
IEEE Trans. Computers, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Eva-CAM: A Circuit/Architecture-Level Evaluation Tool for General Content Addressable Memories.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
Application-driven Design Exploration for Dense Ferroelectric Embedded Non-volatile Memories.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
MIMHD: Accurate and Efficient Hyperdimensional Inference Using Multi-Bit In-Memory Computing.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
ICCAD Tutorial Session Paper Ferroelectric FET Technology and Applications: From Devices to Systems.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Performance Analysis of Semi-supervised Learning in the Small-data Regime using VAEs.
CoRR, 2020
A Hybrid FeMFET-CMOS Analog Synapse Circuit for Neural Network Training and Inference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
A Device Non-Ideality Resilient Approach for Mapping Neural Networks to Crossbar Arrays.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2018
Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018