Arjun Chaudhuri

IEEE Trans. Very Large Scale Integr. Syst., July, 2024

SPICED: Syntactical Bug and Trojan Pattern Identification in A/MS Circuits using LLM-Enhanced Detection.

[BibT_eX]

[DOI]

CoRR, 2024

Defect Analysis for FeFETs using a Compact Model.

[BibT_eX]

[DOI]

Dhruv Thapar

Kai Ni

Proceedings of the IEEE International Test Conference, 2024

Safety-Guided Test Generation for Structural Faults.

[BibT_eX]

[DOI]

Rubin A. Parekhji

Proceedings of the IEEE International Test Conference, 2024

2023

Transferable Graph Neural Network-Based Delay-Fault Localization for Monolithic 3-D ICs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

Built-In Self-Test of High-Density and Realistic ILV Layouts in Monolithic 3-D ICs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., March, 2023

ChipNeMo: Domain-Adapted LLMs for Chip Design.

[BibT_eX]

[DOI]

CoRR, 2023

Innovation Practices Track: Testability and Dependability of AI Hardware and Autonomous Systems.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Special Session: Using Graph Neural Networks for Tier-Level Fault Localization in Monolithic 3D ICs *.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Functional Test Generation for AI Accelerators using Bayesian Optimization∗.

[BibT_eX]

[DOI]

Ching-Yuan Chen

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Analysis and Characterization of Defects in FeFETs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2023

Scan Cell Segmentation Based on Reinforcement Learning for Power-Safe Testing of Monolithic 3D ICs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2023

Test-Point Insertion for Power-Safe Testing of Monolithic 3D ICs using Reinforcement Learning*.

[BibT_eX]

[DOI]

Proceedings of the IEEE European Test Symposium, 2023

Securing Heterogeneous 2.5D ICs Against IP Theft through Dynamic Interposer Obfuscation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

Fault Modeling, Design-for-Test, and Fault Tolerance for Machine Learning Hardware.

[BibT_eX]

[DOI]

PhD thesis, 2022

Functional Criticality Analysis of Structural Faults in AI Accelerators.

[BibT_eX]

[DOI]

Fei Su

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

C-Testing and Efficient Fault Localization for AI Accelerators.

[BibT_eX]

[DOI]

Chunsheng Liu

Xiaoxin Fan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Design Automation and Test Solutions for Monolithic 3D ICs.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2022

Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2022

Special Session: Fault Criticality Assessment in AI Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

Automatic Structural Test Generation for Analog Circuits using Neural Twins.

[BibT_eX]

[DOI]

Mayukh Bhattacharya

Proceedings of the IEEE International Test Conference, 2022

Fault Diagnosis for Resistive Random-Access Memory and Monolithic Inter-tier Vias in Monolithic 3D Integration.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2022

Probabilistic Fault Grading for AI Accelerators using Neural Twins.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Structural Test Generation for AI Accelerators using Neural Twins.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022

Machine Learning for Testing Machine-Learning Hardware: A Virtuous Cycle.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

TaintLock: Preventing IP Theft through Lightweight Dynamic Scan Encryption using Taint Bits*.

[BibT_eX]

[DOI]

Proceedings of the IEEE European Test Symposium, 2022

Graph Neural Network-based Delay-Fault Localization for Monolithic 3D ICs.

[BibT_eX]

[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

Variation-Aware Delay Fault Testing for Carbon-Nanotube FET Circuits.

[BibT_eX]

[DOI]

August Ning

IEEE Trans. Very Large Scale Integr. Syst., 2021

Efficient Fault-Criticality Analysis for AI Accelerators using a Neural Twin∗.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2021

Testing and Fault-Localization Solutions for Monolithic 3D ICs*.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference in Asia, 2021

ParaMitE: Mitigating Parasitic CNFETs in the Presence of Unetched CNTs.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Fault-Criticality Assessment for AI Accelerators using Graph Convolutional Networks.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Advances in Testing and Design-for-Test Solutions for M3D Integrated Circuits.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Analysis of the Impact of Process Variations and Manufacturing Defects on the Performance of Carbon-Nanotube FETs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2020

Advances in Design and Test of Monolithic 3-D ICs.

[BibT_eX]

[DOI]

IEEE Des. Test, 2020

Functional Criticality Classification of Structural Faults in AI Accelerators.

[BibT_eX]

[DOI]

Fei Su

Proceedings of the IEEE International Test Conference, 2020

RTL-to-GDS Design Tools for Monolithic 3D ICs.

[BibT_eX]

[DOI]

Saibal Mukhopadhyay

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

C-Testing of AI Accelerators *.

[BibT_eX]

[DOI]

Chunsheng Liu

Xiaoxin Fan

Proceedings of the 29th IEEE Asian Test Symposium, 2020

NodeRank: Observation-Point Insertion for Fault Localization in Monolithic 3D ICs∗.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE Asian Test Symposium, 2020

2019

Compact Scalable Dynamic TSV IR Drop Compensation for Power Delivery in 3D Packages.

[BibT_eX]

[DOI]

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Hardware Fault Tolerance for Binary RRAM Crossbars.

[BibT_eX]

[DOI]

Bonan Yan

Yiran Chen

Proceedings of the IEEE International Test Conference, 2019

Fault-Tolerant Neuromorphic Computing Systems.

[BibT_eX]

[DOI]

Mengyun Liu

Proceedings of the IEEE International Test Conference, 2019

Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE European Test Symposium, 2019

RTL-to-GDS Tool Flow and Design-for-Test Solutions for Monolithic 3D ICs.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

Analysis of Process Variations, Defects, and Design-Induced Coupling in Memristors.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2018

2017

Single chip self-tunable N-input N-output PID control system with integrated analog front-end for miniature robotics.

[BibT_eX]

[DOI]

Anindya Shankar Bhandari

Proceedings of the 14th IEEE International Conference on Networking, Sensing and Control, 2017

2016

Selective De-noising of Sparse-Coloured Images.

[BibT_eX]

[DOI]

CoRR, 2016

Single Chip Self-Tunable N-Input N-Output PID Control System with Integrated Analog Front-end for Miniature Robotics.

[BibT_eX]

[DOI]

Anindya Shankar Bhandari