Aritra Hazra

Orcid: 0000-0003-2076-3577

According to our database1, Aritra Hazra authored at least 59 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2024
Systematically Quantifying Cryptanalytic Nonlinearities in Strong PUFs.
IEEE Trans. Inf. Forensics Secur., 2024

DiffClone: Enhanced Behaviour Cloning in Robotics with Diffusion-Driven Policy Learning.
CoRR, 2024

PURSE: Property Ordering Using Runtime Statistics for Efficient Multi - Property Verification.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
CoVerPlan: A Comprehensive Verification Planning Framework Leveraging PSS Specifications.
ACM Trans. Design Autom. Electr. Syst., January, 2023

Explainable Decision Tree-Based Screening of Cognitive Impairment Leveraging Minimal Neuropsychological Tests.
Proceedings of the Pattern Recognition and Machine Intelligence, 2023

Analog Coverage-driven Selection of Simulation Corners for AMS Integrated Circuits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
Physically Related Functions: Exploiting Related Inputs of PUFs for Authenticated-Key Exchange.
IEEE Trans. Inf. Forensics Secur., 2022

The CoveRT Approach for Coverage Management in Analog and Mixed-Signal Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Systematically Quantifying Cryptanalytic Non-Linearities in Strong PUFs.
IACR Cryptol. ePrint Arch., 2022

PAC Learnability of iPUF Variants.
IACR Cryptol. ePrint Arch., 2022

Towards Adversarial Purification using Denoising AutoEncoders.
CoRR, 2022

Formal Methods for Characterization and Analysis of Quality Specifications in Component-based Systems.
CoRR, 2022

Optimal Multi-Agent Path Finding for Precedence Constrained Planning Tasks.
CoRR, 2022

Tracking Coverage Artefacts for Periodic Signals using Sequence-based Abstractions.
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

2021
FaultDroid: An Algorithmic Approach for Fault-Induced Information Leakage Analysis.
ACM Trans. Design Autom. Electr. Syst., 2021

Learnability of Multiplexer PUF and S<sub>N</sub>-PUF : A Fourier-based Approach.
IACR Cryptol. ePrint Arch., 2021

Physically Related Functions: A New Paradigm for Light-weight Key-Exchange.
IACR Cryptol. ePrint Arch., 2021

Usage-Driven Personalization of Power Management Logic.
IEEE Embed. Syst. Lett., 2021

SMT-Based Verification of Safety-Critical Embedded Control Software.
IEEE Embed. Syst. Lett., 2021

Detecting Adversaries, yet Faltering to Noise? Leveraging Conditional Variational AutoEncoders for Adversary Detection in the Presence of Noisy Images.
CoRR, 2021

Methodology for Biasing Random Simulation for Rapid Coverage of Corner Cases in AMS Designs.
CoRR, 2021

An RL based Approach for Thermal-Aware Energy Optimized Task Scheduling in Multi-core Processors.
Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

Formal Analysis of Physically Unclonable Functions.
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

SACReD: An Attack Framework on SAC Resistant Delay-PUFs leveraging Bias and Reliability Factors.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Assertions for Protecting Mixed-Signal Latency Contracts in Power Management.
IEEE Trans. Very Large Scale Integr. Syst., 2020

FEDS: Comprehensive Fault Attack Exploitability Detection for Software Implementations of Block Ciphers.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020

SAFARI: Automatic Synthesis of Fault-Attack Resistant Block Cipher Implementations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Interpose PUF can be PAC Learned.
IACR Cryptol. ePrint Arch., 2020

Early-Stage Resource Estimation from Functional Reliability Specification in Embedded Cyber-Physical Systems.
CoRR, 2020

CoveRT: A Coverage Reporting Tool for Analog Mixed-Signal Designs.
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

PUF-G: A CAD Framework for Automated Assessment of Provable Learnability from Formal PUF Representations.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

SOLOMON: An Automated Framework for Detecting Fault Attack Vulnerabilities in Hardware.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

The Notion of Cross Coverage in AMS Design Verification.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Formal Analysis of PUF Instances Leveraging Correlation-Spectra in Boolean Functions.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2019

Formal Verification for Security in IoT Devices.
Proceedings of the Security and Fault Tolerance in Internet of Things, 2019

2018
An Algorithmic Approach to Formally Verify an ECC Library.
ACM Trans. Design Autom. Electr. Syst., 2018

Testability Analysis of PUFs Leveraging Correlation-Spectra in Boolean Functions.
CoRR, 2018

Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

2017
RELSPEC: a framework for reliability aware design of component based embedded systems.
Des. Autom. Embed. Syst., 2017

Formal Verification of Power Management Logic with Mixed-Signal Domains.
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

XFC: A Framework for eXploitable Fault Characterization in Block Ciphers.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
Formal assessment of reliability specifications in embedded cyber-physical systems.
J. Appl. Log., 2016

Synthesis of scheduler automata guaranteeing stability and reliability of embedded control systems.
Proceedings of the 20th International Symposium on VLSI Design and Test, 2016

2015
RELSPEC: A Framework for Early Reliability Refinement of Embedded Applications.
Proceedings of the 28th International Conference on VLSI Design, 2015

2014
Synthesis of sampling modes for adaptive control.
Proceedings of the 2014 IEEE International Conference on Control System, 2014

2013
Formal Verification of Architectural Power Intent.
IEEE Trans. Very Large Scale Integr. Syst., 2013

POWER-TRUCTOR: An Integrated Tool Flow for Formal Verification and Coverage of Architectural Power Intent.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Reliability Guarantees in Automata-Based Scheduling for Embedded Control Software.
IEEE Embed. Syst. Lett., 2013

Formal Methods for Early Analysis of Functional Reliability in Component-Based Embedded Applications.
IEEE Embed. Syst. Lett., 2013

Handling fault detection latencies in automata-based scheduling for embedded control software.
Proceedings of the 2013 IEEE International Symposium on Computer-Aided Control System Design, 2013

2012
POWER-SIM: An SOC Simulator for Estimating Power Profiles of Mobile Workloads.
J. Low Power Electron., 2012

Cohesive Coverage Management: Simulation Meets Formal Methods.
J. Electron. Test., 2012

Reliability annotations to formal specifications of context-sensitive safety properties in embedded systems.
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012

Formal methods for coverage analysis of architectural power states in power-managed designs.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
POWER-SIM: An SOC Simulator for Estimating Power Profiles of Mobile Workloads.
Proceedings of the International Symposium on Electronic System Design, 2011

2010
Coverage Management with Inline Assertions and Formal Test Points.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent.
Proceedings of the 47th Design Automation Conference, 2010

2009
Inline Assertions - Embedding Formal Properties in a Test Bench.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2008
Cohesive Coverage Management for Simulation and Formal Property Verification.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008


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