Aritra Bhattacharyay

According to our database, Aritra Bhattacharyay authored at least 6 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Trimming The Fat: A Minimum-Security Architecture for Protecting SoC Designs Against Supply Chain Threats.

Kshitij Raj, Aritra Bhattacharyay, Swarup Bhunia, Sandip Ray

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023

An Automated Framework for Board-Level Trojan Benchmarking.

Aritra Bhattacharyay, Shuo Yang, Jonathan Cruz, Prabuddha Chakraborty, Swarup Bhunia, Tamzidul Hoque

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023

2022

VIPR-PCB: a machine learning based golden-free PCB assurance framework.

Aritra Bhattacharyay, Prabuddha Chakraborty, Jonathan Cruz, Swarup Bhunia

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2020

An Automated Framework for Board-level Trojan Benchmarking.

Tamzidul Hoque, Shuo Yang, Aritra Bhattacharyay, Jonathan Cruz, Swarup Bhunia

CoRR, 2020

2019

Automated Defective Pin Detection for Recycled Microelectronics Identification.

Pallabi Ghosh, Aritra Bhattacharya, Domenic Forte, Rajat Subhra Chakraborty

J. Hardw. Syst. Secur., 2019

Deep Learning based Model Building Attacks on Arbiter PUF Compositions.

Pranesh Santikellur, Aritra Bhattacharyay, Rajat Subhra Chakraborty

IACR Cryptol. ePrint Arch., 2019