Arij Shallufa

According to our database1, Arij Shallufa authored at least 3 papers between 2016 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Inspection of Partial Bitstreams for FPGAs Using Artificial Neural Networks.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

IP Core Identification in FPGA Configuration Files using Machine Learning Techniques.
Proceedings of the 9th IEEE International Conference on Consumer Electronics, 2019

2016
A Design Methodology for the Next Generation Real-Time Vision Processors.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016


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