Archit Joshi

Orcid: 0000-0001-6891-5803

According to our database1, Archit Joshi authored at least 7 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
Data Path Nonlinearity Estimation for 200 Gbps PAM4 Serdes Receivers.
IEEE Access, 2024

2019
A Low-Pass Filter Bandwidth Adaptation Technique for Phase Interpolators.
IEEE Trans. Very Large Scale Integr. Syst., 2019

An Odd Phase CDR With Phase Interpolator Trimming.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

2017
Nonlinearity Estimation for Compensation of Phase Interpolator in Bang-Bang CDRs.
IEEE Trans. Very Large Scale Integr. Syst., 2017

2016
Bandwidth Compensation Technique for Digital PLL.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

2015
Period Jitter of Frequency-Locked Loops.
IEEE Trans. Very Large Scale Integr. Syst., 2015

2008
Analysis of Bang-bang CDR circuits with equations of linear motion.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008


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