Archana Pandey

According to our database, Archana Pandey authored at least 4 papers between 2016 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Behaviour of FinFET Inverter's Effective Capacitances in Low-Voltage Domain.

Sarita Yadav, Nitanshu Chauhan, Archana Pandey, Rajendra Pratap, Anand Bulusu

Proceedings of the 25th International Symposium on VLSI Design and Test, 2021

2019

A Novel 20nm FinFET Based 10T SRAM Cell Design for Improved Performance.

Anushka Singh, Yash Sharma, Arvind Sharma, Archana Pandey

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

2018

A modified method of logical effort for FinFET circuits considering impact of fin-extension effects.

Archana Pandey, Pitul Garg, Shobhit Tyagi, Rajeev Ranjan, Anand Bulusu

Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

2016

FinFET Device Circuit Co-design Issues: Impact of Circuit Parameters on Delay.

Archana Pandey, Harsh Kumar, Praanshu Goyal, Sudeb Dasgupta, S. K. Manhas, Anand Bulusu

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016