Arcel G. Leynes

According to our database1, Arcel G. Leynes authored at least 7 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2023
A 288nV/√Hz low-noise capacitively-coupled instrumentation amplifier (CCIA) in 22-nm UTBB FD-SOI for signal conditioning of MEMS piezoresistive pressure sensors.
Proceedings of the 20th International SoC Design Conference, 2023

A high CMRR, high input impedance current-feedback instrumentation amplifier (CFIA) in 22-nm UTBB FD-SOI for signal conditioning of MEMS piezoresistive pressure sensors.
Proceedings of the 20th International SoC Design Conference, 2023

2021
A CMOS Power Management Unit with Undervoltage Lockout Circuit as Startup for Piezoelectric Energy Harvesting Applications.
Proceedings of the 18th International SoC Design Conference, 2021

Asymmetric Charge Transfer Scheme Model in ML-SSHC with Consistent Power Extraction Improvement for Piezoelectric Energy Harvesters.
Proceedings of the 18th International SoC Design Conference, 2021

2019
A 0.5 V Low-Power All-Digital Phase-Locked Loop in 65 nm Complementary Metal-Oxide-Semiconductor Process.
J. Low Power Electron., 2019

2018
A 0.5V Low-Power All-Digital Phase-Locked Loop in 65nm CMOS Process for Wireless Sensing Applications.
Proceedings of the TENCON 2018, 2018



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