Anuj Verma

According to our database, Anuj Verma authored at least 7 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

High-Throughput and Hardware-Efficient ASIC-Chip Fabrication of Reconfigurable LDPC/Polar Decoder for mMTC and URLLC 5G-NR Applications.

Anuj Verma, Rahul Shrestha

IEEE Trans. Circuits Syst. I Regul. Pap., September, 2024

2023

Low Computational-Complexity SOMS-Algorithm and High-Throughput Decoder Architecture for QC-LDPC Codes.

Anuj Verma, Rahul Shrestha

IEEE Trans. Veh. Technol., 2023

2022

Cross Country Determinants of Investors' Sentiments Prediction in Emerging Markets Using ANN.

Ananth Rao, Manoj Kumar M. V, Immanuel Azaad Moonesar, Shadi Atalla, B. S. Prashanth, Gaurav Joshi, Tarun K. Soni, Thi Le, Anuj Verma, Hazem Marashdeh

Frontiers Artif. Intell., 2022

2021

Hardware-Efficient and High-Throughput LLRC Segregation Based Binary QC-LDPC Decoding Algorithm and Architecture.

Anuj Verma, Rahul Shrestha

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Analysing Cyberbullying using Natural Language Processing by Understanding Jargon in Social Media.

Bhumika Bhatia, Anuj Verma, Anjum, Rahul Katarya

CoRR, 2021

2020

A New Partially-Parallel VLSI-Architecture of Quasi-Cyclic LDPC Decoder for 5G New-Radio.

Anuj Verma, Rahul Shrestha

Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

A New VLSI Architecture of Next-Generation QC-LDPC Decoder for 5G New-Radio Wireless-Communication Standard.

Anuj Verma, Rahul Shrestha

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020