Anuj Pushkarna

According to our database1, Anuj Pushkarna authored at least 2 papers in 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2010
Comparison of performance parameters of SRAM designs in 16nm CMOS and CNTFET technologies.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Reliability analysis of power gated SRAM under combined effects of NBTI and PBTI in nano-scale CMOS.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010


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