Antonio Toro-Frías

According to our database, Antonio Toro-Frías authored at least 9 papers between 2011 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator.

Antonio Toro-Frías, Pablo Saraza-Canflanca, Fábio Passos, Pablo Martín-Lloret, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs.

Antonio Toro-Frías, Pablo Martín-Lloret, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández

Proceedings of the 15th International Conference on Synthesis, 2018

Automated Massive RTN Characterization Using a Transistor Array Chip.

Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández

Proceedings of the 15th International Conference on Synthesis, 2018

A Model Parameter Extraction Methodology Including Time-Dependent Variability for Circuit Reliability Simulation.

Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Antonio Toro-Frías, Rafael Castro-López, Javier Martín-Martínez, Elisenda Roca, Rosana Rodríguez, Francisco V. Fernández, Montserrat Nafría

Proceedings of the 15th International Conference on Synthesis, 2018

2017

Including a stochastic model of aging in a reliability simulation flow.

Antonio Toro-Frías, Pablo Martín-Lloret, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría

Proceedings of the 14th International Conference on Synthesis, 2017

CASE: A reliability simulation tool for analog ICs.

Pablo Martín-Lloret, Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría

Proceedings of the 14th International Conference on Synthesis, 2017

A size-adaptive time-step algorithm for accurate simulation of aging in analog ICs.

Pablo Martín-Lloret, Antonio Toro-Frías, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016

Reliability simulation for analog ICs: Goals, solutions, and challenges.

Antonio Toro-Frías, Pablo Martín-Lloret, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández

Integr., 2016

2011

Layout-aware Pareto fronts of electronic circuits.

Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011