Antonio Carneiro de Mesquita Filho
According to our database1,
Antonio Carneiro de Mesquita Filho
authored at least 37 papers
between 1993 and 2018.
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Bibliography
2018
A 99.95% linearity readout circuit with 72 dB dynamic range for active pixel sensors.
Int. J. Circuit Theory Appl., 2018
2016
Circuits Syst. Signal Process., 2016
2010
Optimizing Capacitance Ratio Assignment for Low-Sensitivity SC Filter Implementation.
IEEE Trans. Evol. Comput., 2010
Using a Genetic Algorithm to Optimize Capacitance Ratio Approximations in SC Filters.
Circuits Syst. Signal Process., 2010
Proceedings of the Evolvable Systems: From Biology to Hardware, 2010
2009
Evol. Intell., 2009
Evolutionary synthesis of low-sensitivity antenna matching networks using adjacency matrix representation.
Proceedings of the IEEE Congress on Evolutionary Computation, 2009
2008
Introduction to Evolvable Hardware: A Practical Guide for Designing Self-Adaptive Systems.
Genet. Program. Evolvable Mach., 2008
Proceedings of the MICAI 2008: Advances in Artificial Intelligence, 2008
Evolutionary synthesis of low-sensitivity equalizers using adjacency matrix representation.
Proceedings of the Genetic and Evolutionary Computation Conference, 2008
2007
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
2006
Using Swarm Intelligence to Solve Some Analog Test Issues.
Proceedings of the 7th Latin American Test Workshop, 2006
2005
Proceedings of the 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June, 2005
Proceedings of the 2005 Design, 2005
2004
ATPG for fault diagnosis on analog electrical networks using evolutionary techniques.
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Proceedings of the Computational Science, 2004
Proceedings of the Applications of Evolutionary Computing, 2004
Proceedings of the 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 2004
2003
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003
Proceedings of the Evolvable Systems: From Biology to Hardware, 2003
An Experiment on Nonlinear Synthesis Using Evolutionary Techniques Based only on CMOS Transistors.
Proceedings of the 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 2003
Proceedings of the 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 2003
2002
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002
Proceedings of the 7th Brazilian Symposium on Neural Networks (SBRN 2002), 2002
State Model Approach for Analog Fault Modeling.
Proceedings of the 3rd Latin American Test Workshop, 2002
Designing for Test Butterworth and Chebyshev Low-Pass Filters of Any Order.
Proceedings of the 3rd Latin American Test Workshop, 2002
Chromosome Representation through Adjacency Matrix in Evolutionary Circuits Synthesis.
Proceedings of the 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 2002
2001
J. Electron. Test., 2001
Filter Sensitivity Analysis Using the TRAM.
Proceedings of the 2nd Latin American Test Workshop, 2001
Designing Testable Networks for Transfer Function Realization.
Proceedings of the 2nd Latin American Test Workshop, 2001
2000
Proceedings of the 6th Brazilian Symposium on Neural Networks (SBRN 2000), 2000
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
1996
Proceedings of the conference on European design automation, 1996
1995
A modular distributed-arithmetic implementation of the inner product and its application to digital filters.
J. VLSI Signal Process., 1995
A methodology for the implementation of protocols in hardware from a formal description.
Proceedings of the Protocol Specification, 1995
1993
Microprocess. Microprogramming, 1993