Anton Biasizzo

IEEE Access, 2023

Towards Deploying Highly Quantized Neural Networks on FPGA Using Chisel.

[BibT_eX]

[DOI]

Jure Vreca

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

A Configurable Mixed-Precision Convolution Processing Unit Generator in Chisel.

[BibT_eX]

[DOI]

Jure Vreca

Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

2022

Data multiplexed and hardware reused architecture for deep neural network accelerator.

[BibT_eX]

[DOI]

Gopal Raut

Santosh Kumar Vishvakarma

Narendra Singh Dhakad

Neha Gupta

Gregor Papa

Neurocomputing, 2022

On Suitability of the Customized Measuring Device for Electric Motor.

[BibT_eX]

[DOI]

Proceedings of the IECON 2022, 2022

2021

An Open-Source Approach to Solving the Problem of Accurate Food-Intake Monitoring.

[BibT_eX]

[DOI]

Barbara Korousic-Seljak

IEEE Access, 2021

Detecting Network Intrusion Using Binarized Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 7th IEEE World Forum on Internet of Things, 2021

2019

Data Transmission Efficiency in Bluetooth Low Energy Versions.

[BibT_eX]

[DOI]

Patricio Bulic

Gasper Kojek

Sensors, 2019

2013

Hardware Accelerated Compression of LIDAR Data Using FPGA Devices.

[BibT_eX]

[DOI]

Sensors, 2013

2012

On line self recovery of embedded multi-processor SOC on FPGA using dynamic partial reconfiguration.

[BibT_eX]

[DOI]

Inf. Technol. Control., 2012

Test Strategies for Embedded ADC Cores in a System-on-Chip, A Case Study.

[BibT_eX]

[DOI]

Peter Mrak

Comput. Informatics, 2012

2011

A compact AES core with on-line error-detection for FPGA applications with modest hardware resources.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2011

Self-reparable system on FPGA for single event upset recovery.

[BibT_eX]

[DOI]

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

FPGA Soft Error Recovery Mechanism with Small Hardware Overhead.

[BibT_eX]

[DOI]

Proceedings of the 16th European Test Symposium, 2011

Soft Error Recovery Technique for Multiprocessor SOPC.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2010

On measurement uncertainty of ADC nonlinearities in oscillation-based test.

[BibT_eX]

[DOI]

Peter Mrak

Proceedings of the 15th European Test Symposium, 2010

Automated SEU fault emulation using partial FPGA reconfiguration.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009

Functional Testing of Processor Cores in FPGA-Based Applications.

[BibT_eX]

[DOI]

Comput. Informatics, 2009

2006

Security Extension for IEEE Std 1149.1.

[BibT_eX]

[DOI]

Jean-Pierre Van der Heyden

J. Electron. Test., 2006

2004

Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in Europ.

[BibT_eX]

[DOI]

Hans-Joachim Wunderlich

Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004

2003

Test Engineering Education in Europe: the EuNICE-Test Project.

[BibT_eX]

[DOI]

Hans-Joachim Wunderlich

Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

2002

Linux-based experimental boundary scan environment.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2002

2000

Sequential diagnosis tool.

[BibT_eX]

[DOI]

Alenka Zuzek

Microprocess. Microsystems, 2000

On the diagnosing algorithm for networks.

[BibT_eX]

[DOI]

Int. J. Comput. Math., 2000

A Methodology for Model-based Diagnosis of Analogue Circuits.

[BibT_eX]

[DOI]

Appl. Artif. Intell., 2000

1998

Sequential Diagnosis with Asymmetrical Tests.

[BibT_eX]

[DOI]

Alenka Zuzek