Antian Wang
Orcid: 0000-0002-2271-486X
According to our database1,
Antian Wang
authored at least 11 papers
between 2020 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
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2024
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Bibliography
2024
PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption.
IEEE Trans. Inf. Forensics Secur., 2024
2023
High-Speed VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography.
IEEE Trans. Computers, September, 2023
NNTesting: Neural Network Fault Attacks Detection Using Gradient-Based Test Vector Generation.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023
2022
Integral Sampler and Polynomial Multiplication Architecture for Lattice-based Cryptography.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Low-Latency VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography.
CoRR, 2021
A Task-Oriented Dialogue Architecture via Transformer Neural Language Models and Symbolic Injection.
Proceedings of the 22nd Annual Meeting of the Special Interest Group on Discourse and Dialogue, 2021
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2021
2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020