Anthony Shi-Sheung Fong

Affiliations:
  • City University of Hong Kong


According to our database1, Anthony Shi-Sheung Fong authored at least 37 papers between 1998 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Bibliography

2013
Parallel architecture for DNA sequence inexact matching with Burrows-Wheeler Transform.
Microelectron. J., 2013

Advanced Instruction Folding for an Object-oriented Processor.
Proceedings of the Tenth International Conference on Information Technology: New Generations, 2013

2012
Heuristic optimisation algorithm for Java dynamic compilation.
IET Softw., 2012

HISC: A computer architecture using operand descriptor.
Comput. Electr. Eng., 2012

A Hardware-Software Integrated Design for a High-Performance Java Processor.
Proceedings of the Ninth International Conference on Information Technology: New Generations, 2012

2009
An instruction folding solution for a Java processor.
Comput. Syst. Sci. Eng., 2009

A Object Model for Java and Its Architectural Support.
Proceedings of the Sixth International Conference on Information Technology: New Generations, 2009

PPoSOM: A Multidimensional Data Visualization Using Probabilistic Assignment Based on Polar SOM.
Proceedings of the Neural Information Processing, 16th International Conference, 2009

2008
Global/Local Hashed Perceptron Branch Prediction.
Proceedings of the Fifth International Conference on Information Technology: New Generations (ITNG 2008), 2008

An Extensive Hardware/Software Co-design on a Descriptor-Based Embedded Java Processor.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

2007
Pretenuring in Java by Object Lifetime and Reference Density Using Scratch-Pad Memory.
Proceedings of the 15th Euromicro International Conference on Parallel, 2007

An Instruction Folding Solution to a Java Processor.
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2007

Memory Garbage Collection for an Object-Oriented Processor.
Proceedings of the Fourth International Conference on Information Technology: New Generations (ITNG 2007), 2007

A Study of Dynamic Branch Predictors: Counter versus Perceptron.
Proceedings of the Fourth International Conference on Information Technology: New Generations (ITNG 2007), 2007

Architectural Solution to Object-Oriented Programming.
Proceedings of the Advances in Computer Systems Architecture, 2007

Combining Local and Global History Hashing in Perceptron Branch Prediction.
Proceedings of the 6th Annual IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007), 2007

2006
A Java processor with hardware-support object-oriented instructions.
Microprocess. Microsystems, 2006

A Performance Analysis of an Object-Oriented Processor.
Proceedings of the Third International Conference on Information Technology: New Generations (ITNG 2006), 2006

Architectural Support on Object-Oriented Programming in a JAVA Processor.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005
A Novel JAVA Processor for Embedded Devices.
Proceedings of the Embedded Computer Systems: Architectures, 2005

A Hardware/Software Co-design and Co-verification on a Novel Embedded Object-Oriented Processor.
Proceedings of the Embedded and Ubiquitous Computing, 2005

Hardware Concurrent Garbage Collection for Short-Lived Objects in Mobile Java Devices.
Proceedings of the Embedded and Ubiquitous Computing, 2005

A Novel Just-In-Time Compiler on an Embedded Object-Oriented Processor.
Proceedings of the Fifth International Conference on Computer and Information Technology (CIT 2005), 2005

2004
Online Analytic Mining for Web Access Patterns.
Proceedings of the Advanced Topics in Database Research, Vol. 3, 2004

2003
A computer architecture with system attributes on individual instruction operands.
PhD thesis, 2003

Test bench for software development of object-oriented processor.
SIGARCH Comput. Archit. News, 2003

Method manipulation in an object-oriented processor.
SIGARCH Comput. Archit. News, 2003

Object-oriented processor requirements with instruction analysis of Java programs.
SIGARCH Comput. Archit. News, 2003

Support of Java API for the jHISC system.
SIGARCH Comput. Archit. News, 2003

A computer architecture with access control and cache option tags on individual instruction operands.
SIGARCH Comput. Archit. News, 2003

Concurrent Data Materialization for Object-Relational Database with Semantic Metadata.
Int. J. Softw. Eng. Knowl. Eng., 2003

Hardware support for user-access control on an object-oriented processor.
Proceedings of the 1st Intenational Symposium on Information and Communication Technologies, 2003

2001
Dynamic memory allocation behavior in Java programs.
Proceedings of the ISCA 16th International Conference Computers and Their Applications, 2001

2000
bject-Relational Database Management System (ORDBMS) Using Frame Model Approach.
Proceedings of the 2000 International Symposium on Information Technology (ITCC 2000), 2000

1998
Integrated partition integer execution unit for multimedia and conventional applications.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

An Analysis of Multimedia Algorithms and Corresponding Hardware Architectural Support.
Proceedings of the EUROMEDIA 1998 featuring WEBTEC-MEDIATEC-COMTEC-APTEC, 1998

Architecture support of a descriptor computer on object-orientation.
Proceedings of the Computers and Their Applications (CATA-98), 1998


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