Anthony J. Walton
Orcid: 0000-0002-8110-2230
According to our database1,
Anthony J. Walton
authored at least 18 papers
between 1992 and 2018.
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Bibliography
2018
A Microelectrode Array with Reproducible Performance Shows Loss of Consistency Following Functionalization with a Self-Assembled 6-Mercapto-1-hexanol Layer.
Sensors, 2018
2017
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017
Polydimethylsiloxane (PDMS)-based microfluidic channel with integrated commercial pressure sensors.
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017
2014
2010
Multi-Factorial Analysis of Class Prediction Error: Estimating Optimal Number of Biomarkers for Various Classification Rules.
J. Bioinform. Comput. Biol., 2010
2008
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
2006
ESPACENET: A Framework of Evolvable and Reconfigurable Sensor Networks for Aerospace-Based Monitoring and Diagnostics.
Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006
2004
Modelling of binary phase modulation in surface stabilized ferroelectric liquid crystal spatial light modulators.
Microelectron. J., 2004
2003
Microelectron. Reliab., 2003
1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
1997
Proceedings of the 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 1997
1996
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996
1995
Proceedings of the 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1995
Proceedings of the 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1995
1994
Efficient Critical Area Algorithms and Their Application to Yield Improvement and Test Strategies.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994
1992
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992