Anthony Agnesina
Orcid: 0000-0003-0393-0230
According to our database1,
Anthony Agnesina
authored at least 29 papers
between 2018 and 2024.
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Bibliography
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2024
Optimizing Predictive AI in Physical Design Flows with Mini Pixel Batch Gradient Descent.
Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, 2024
Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, 2024
Proceedings of the 2024 International Symposium on Physical Design, 2024
Proceedings of the 2024 International Symposium on Physical Design, 2024
Proceedings of the 2024 International Symposium on Physical Design, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
2023
A PPA Study of Reinforced Placement Parameter Autotuning: Pseudo-3D vs. True-3D Placers.
ACM Trans. Design Autom. Electr. Syst., September, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023
Proceedings of the 2023 International Symposium on Physical Design, 2023
Proceedings of the 2023 International Symposium on Physical Design, 2023
Invited Paper: CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
2022
Electronic Design Automation for High-Performance and Reliable 3D Memory Cubes and Processors.
PhD thesis, 2022
A Clock Tree Prediction and Optimization Framework Using Generative Adversarial Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
ART-3D: Analytical 3D Placement with Reinforced Parameter Tuning for Monolithic 3D ICs.
Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
ACM Trans. Design Autom. Electr. Syst., 2020
IEEE Comput. Archit. Lett., 2020
A Fault-Tolerant and High-Speed Memory Controller Targeting 3D Flash Memory Cubes for Space Applications.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
2019
GAN-CTS: A Generative Adversarial Framework for Clock Tree Prediction and Optimization.
Proceedings of the International Conference on Computer-Aided Design, 2019
Reducing Compilation Effort in Commercial FPGA Emulation Systems Using Machine Learning.
Proceedings of the International Conference on Computer-Aided Design, 2019
2018
Proceedings of the 55th Annual Design Automation Conference, 2018