Ansgar Stammermann

According to our database1, Ansgar Stammermann authored at least 9 papers between 1999 and 2003.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2003
Interconnect Driven Low Power High-Level Synthesis.
Proceedings of the Integrated Circuit and System Design, 2003

Binding, Allocation and Floorplanning in Low Power High-Level Synthesis.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2002
An Improved Power Macro-Model for Arithmetic Datapath Components.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

2001
Estimation of lower and upper bounds on the power consumption from scheduled data flow graphs.
IEEE Trans. Very Large Scale Integr. Syst., 2001

System level optimization and design space exploration for low power.
Proceedings of the 14th International Symposium on Systems Synthesis, 2001

2000
Power Macro-Modelling for Firm-Macro.
Proceedings of the Integrated Circuit Design, 2000

Lower Bound Estimation for Low Power High-Level Synthesis.
Proceedings of the 13th International Symposium on System Synthesis, 2000

Lower Bounds on the Power Consumption in Scheduled Data Flow Graphs with Resource Constraints.
Proceedings of the 2000 Design, 2000

1999
Data Type Analysis for Hardware Synthesis from Object-Oriented Models.
Proceedings of the 1999 Design, 1999


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