Anselm Breitenreiter
Orcid: 0000-0001-7095-7551
According to our database1,
Anselm Breitenreiter
authored at least 22 papers
between 2017 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023
2022
Fast Error Propagation Probability Estimates by Answer Set Programming and Approximate Model Counting.
IEEE Access, 2022
Proceedings of the 23rd IEEE Latin American Test Symposium, 2022
2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021
A Tunable Single Event Transient Filter Based on Digitally Controlled Capacitive Delay Cells.
Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021
2020
Microelectron. J., 2020
R-Abax: A Radiation Hardening Legalisation Algorithm Satisfying TMR Spacing Constraints.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
2019
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
Aspects on Timing Modeling of Radiation-Hardness by Design Standard Cell-Based △TMR Flip-Flops.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
2018
D-SET Mitigation Using Common Clock Tree Insertion Techniques for Triple-Clock TMR Flip-Flop.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018
Flip-Flop SEUs Mitigation through Partial Hardening of Internal Latch and Adjustment of Clock Duty Cycle.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018
2017
Proceedings of the Euromicro Conference on Digital System Design, 2017