Anoop Iyer

According to our database1, Anoop Iyer authored at least 5 papers between 2001 and 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2002
Microarchitecture-level power management.
IEEE Trans. Very Large Scale Integr. Syst., 2002

Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors.
Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002

Power efficiency of voltage scaling in multiple clock, multiple voltage cores.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2001
Application-Driven Processor Design Exploration for Power-Performance Trade-off Analysis.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Power aware microarchitecture resource scaling.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001


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