Annachiara Ruospo
Orcid: 0000-0003-2040-9762Affiliations:
- Politecnico di Torino, Turin, Italy
According to our database1,
Annachiara Ruospo
authored at least 40 papers
between 2018 and 2024.
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Bibliography
2024
Proceedings of the 25th IEEE Latin American Test Symposium, 2024
SpikingJET: Enhancing Fault Injection for Fully and Convolutional Spiking Neural Networks.
Proceedings of the 30th IEEE International Symposium on On-Line Testing and Robust System Design, 2024
Proceedings of the IEEE European Test Symposium, 2024
Proceedings of the IEEE European Test Symposium, 2024
Early Detection of Permanent Faults in DNNs Through the Application of Tensor-Related Metrics.
Proceedings of the 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems, 2024
Model theft attack against a tinyML application running on an Ultra-Low-Power Open-Source SoC.
Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024
2023
Computer, February, 2023
Proceedings of the 41st IEEE VLSI Test Symposium, 2023
Proceedings of the 24th IEEE Latin American Test Symposium, 2023
A Fast Reliability Analysis of Image Segmentation Neural Networks Exploiting Statistical Fault Injections.
Proceedings of the 24th IEEE Latin American Test Symposium, 2023
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023
Image Test Libraries for the on-line self-test of functional units in GPUs running CNNs.
Proceedings of the IEEE European Test Symposium, 2023
Proceedings of the IEEE European Test Symposium, 2023
Uncovering hidden vulnerabilities in CNNs through evolutionary-based Image Test Libraries.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023
Investigating the effect of approximate multipliers on the resilience of a systolic array DNN accelerator.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023
Assessing Convolutional Neural Networks Reliability through Statistical Fault Injections.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
Emulating the Effects of Radiation-Induced Soft-Errors for the Reliability Assessment of Neural Networks.
IEEE Trans. Emerg. Top. Comput., 2022
Machine learning for hardware security: Classifier-based identification of Trojans in pipelined microprocessors.
Appl. Soft Comput., 2022
Proceedings of the 23rd IEEE Latin American Test Symposium, 2022
Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022
Proceedings of the IEEE European Test Symposium, 2022
Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022
2021
Investigating data representation for efficient and reliable Convolutional Neural Networks.
Microprocess. Microsystems, October, 2021
Pros and Cons of Fault Injection Approaches for the Reliability Assessment of Deep Neural Networks.
Proceedings of the 22nd IEEE Latin American Test Symposium, 2021
A Suitability Analysis of Software Based Testing Strategies for the On-line Testing of Artificial Neural Networks Applications in Embedded Devices.
Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021
Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021
Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021
2020
Proceedings of the 38th IEEE VLSI Test Symposium, 2020
Simulation and Formal: The Best of Both Domains for Instruction Set Verification of RISC-V Based Processors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Evaluating Convolutional Neural Networks Reliability depending on their Data Representation.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020
Deterministic Cache-based Execution of On-line Self-Test Routines in Multi-core Automotive System-on-Chips.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
On the Detection of Always-On Hardware Trojans Supported by a Pre-Silicon Verification Methodology.
Proceedings of the 20th International Workshop on Microprocessor/SoC Test, 2019
Proceedings of the IEEE Latin American Test Symposium, 2019
A Decentralized Scheduler for On-line Self-test Routines in Multi-core Automotive System-on-Chips.
Proceedings of the IEEE International Test Conference, 2019
On-line Testing for Autonomous Systems driven by RISC-V Processor Design Verification.
Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019
Non-Intrusive Self-Test Library for Automotive Critical Applications: Constraints and Solutions.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018