Anna Bernasconi

Alessandro Berti

Gianna Maria Del Corso

Alessandro Poggiali

IEEE Access, 2024

UltraMovelets: Efficient Movelet Extraction for Multiple Aspect Trajectory Classification.

[BibT_eX]

[DOI]

Tarlis Tortelli Portela

Vanessa Lago Machado

Jônata Tyska Carvalho

Vania Bogorny

Chiara Renso

Proceedings of the Database and Expert Systems Applications, 2024

2023

Is Bitcoin gathering dust? An analysis of low-amount Bitcoin transactions.

[BibT_eX]

[DOI]

Appl. Netw. Sci., December, 2023

A survey of set accumulators for blockchain systems.

[BibT_eX]

[DOI]

Comput. Sci. Rev., August, 2023

XOR-AND-XOR Logic Forms for Autosymmetric Functions and Applications to Quantum Computing.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

Quantum Feature Selection with Variance Estimation.

[BibT_eX]

[DOI]

Proceedings of the 31st European Symposium on Artificial Neural Networks, 2023

Compact Quantum Circuits for Dimension Reducible Functions.

[BibT_eX]

[DOI]

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Analysis and Characterization of ERC-20 Token Network Topologies.

[BibT_eX]

[DOI]

Proceedings of the Complex Networks & Their Applications XII, 2023

2022

Exploiting Symmetrization and D-Reducibility for Approximate Logic Synthesis.

[BibT_eX]

[DOI]

Tiziano Villa

IEEE Trans. Computers, 2022

Multiplicative Complexity of XOR Based Regular Functions.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2022

Effect of Different Encodings and Distance Functions on Quantum Instance-Based Classifiers.

[BibT_eX]

[DOI]

Proceedings of the Advances in Knowledge Discovery and Data Mining, 2022

AUTOMATISE: Multiple Aspect Trajectory Data Mining Tool Library.

[BibT_eX]

[DOI]

Tarlis Tortelli Portela

Vania Bogorny

Chiara Renso

Proceedings of the 23rd IEEE International Conference on Mobile Data Management, 2022

Clustering Classical Data with Quantum k-Means.

[BibT_eX]

[DOI]

Alessandro Poggiali

Alessandro Berti

Gianna Maria Del Corso

Riccardo Guidotti

Proceedings of the 23rd Italian Conference on Theoretical Computer Science, 2022

On the Optimal OBDD Representation of 2-XOR Boolean Affine Spaces.

[BibT_eX]

[DOI]

Marco Longhi

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

An Analysis of Bitcoin Dust Through Authenticated Queries.

[BibT_eX]

[DOI]

Proceedings of the Complex Networks and Their Applications XI, 2022

2021

Characterization and computation of ancestors in reaction systems.

[BibT_eX]

[DOI]

Soft Comput., 2021

Authenticating Spatial Queries on Blockchain Systems.

[BibT_eX]

[DOI]

Padmanabhan Balasubramanian

IEEE Access, 2021

A Boolean Heuristic for Disjoint SOP Synthesis.

[BibT_eX]

[DOI]

Tiziano Villa

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Autosymmetry of Incompletely Specified Functions.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Stuck-At Fault Mitigation of Emerging Technologies Based Switching Lattices.

[BibT_eX]

[DOI]

J. Electron. Test., 2020

Computing the full quotient in bi-decomposition by approximation.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Multiplicative Complexity of Autosymmetric Functions: Theory and Applications to Security.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Boolean Minimization of Projected Sums of Products via Boolean Relations.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2019

Fault Mitigation of Switching Lattices under the Stuck-At-Fault Model.

[BibT_eX]

[DOI]

Proceedings of the IEEE Latin American Test Symposium, 2019

Testability of Switching Lattices in the Cellular Fault Model.

[BibT_eX]

[DOI]

Luca Frontini

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

Approximate Logic Synthesis by Symmetrization.

[BibT_eX]

[DOI]

Tiziano Villa

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Composition of switching lattices for regular and for decomposed functions.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2018

Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2018

Testability of Switching Lattices in the Stuck at Fault Model.

[BibT_eX]

[DOI]

Luca Frontini

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Two Combinatorial Problems on the Layout of Switching Lattices.

[BibT_eX]

[DOI]

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

The Connection Layout in a Lattice of Four-Terminal Switches.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018

Computing Preimages and Ancestors in Reaction Systems.

[BibT_eX]

[DOI]

Proceedings of the Theory and Practice of Natural Computing - 7th International Conference, 2018

2017

Logic synthesis and testing techniques for switching nano-crossbar arrays.

[BibT_eX]

[DOI]

Mehdi Baradaran Tahoori

Microprocess. Microsystems, 2017

Composition of Switching Lattices and Autosymmetric Boolean Function Synthesis.

[BibT_eX]

[DOI]

Proceedings of the Euromicro Conference on Digital System Design, 2017

2016

Index-Resilient Zero-Suppressed BDDs: Definition and Operations.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2016

Synthesis on switching lattices of Dimension-reducible Boolean functions.

[BibT_eX]

[DOI]

Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Logic Synthesis for Switching Lattices by Decomposition with P-Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Synthesis and Performance Optimization of a Switching Nano-Crossbar Computer.

[BibT_eX]

[DOI]

Mehdi Baradaran Tahoori

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015

On the error resilience of ordered binary decision diagrams.

[BibT_eX]

[DOI]

Lorenzo Lago

Theor. Comput. Sci., 2015

Using Flexibility in P-Circuits by Boolean Relations.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2015

Biconditional-BDD Ordering for Autosymmetric Functions.

[BibT_eX]

[DOI]

Gabriella Trucco

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Bi-Decomposition Using Boolean Relations.

[BibT_eX]

[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014

Autosymmetric and Dimension Reducible Multiple-Valued Functions.

[BibT_eX]

[DOI]

J. Multiple Valued Log. Soft Comput., 2014

Zero-Suppressed Binary Decision Diagrams Resilient to Index Faults.

[BibT_eX]

[DOI]

Proceedings of the Theoretical Computer Science, 2014

2-SPP Approximate Synthesis for Error Tolerant Applications.

[BibT_eX]

[DOI]

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013

Compact DSOP and Partial DSOP Forms.

[BibT_eX]

[DOI]

Theory Comput. Syst., 2013

SOP restructuring by exploiting don't cares.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2013

Minimization of EP-SOPs via Boolean relations.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Error resilient OBDDs.

[BibT_eX]

[DOI]

Lorenzo Lago

Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

Minimization of P-circuits using Boolean relations.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Synthesis of P-circuits for logic restructuring.

[BibT_eX]

[DOI]

Integr., 2012

Projected Don't Cares.

[BibT_eX]

[DOI]

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2011

Dimension-reducible Boolean functions based on affine spaces.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2011

Autosymmetric Multiple-Valued Functions: Theory and Spectral Characterization.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011

An approximation algorithm for cofactoring-based synthesis.

[BibT_eX]

[DOI]

Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

Compact and Testable Circuits for Regular Functions.

[BibT_eX]

[DOI]

Proceedings of the ARCS 2011, 2011

2010

Logic synthesis and testability of D-reducible functions.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

Fun at a Department Store: Data Mining Meets Switching Theory.

[BibT_eX]

[DOI]

Proceedings of the Fun with Algorithms, 5th International Conference, 2010

2009

Logic Minimization and Testability of 2SPP-P-Circuits.

[BibT_eX]

[DOI]

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

On decomposing Boolean functions via extended cofactoring.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

2008

The optimization of kEP-SOPs: Computational complexity, approximability and experiments.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2008

Logic Minimization and Testability of 2-SPP Networks.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Synthesis of Autosymmetric Functions in a New Three-Level Form.

[BibT_eX]

[DOI]

Theory Comput. Syst., 2008

On the construction of small fully testable circuits with low depth.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2008

On Projecting Sums of Products.

[BibT_eX]

[DOI]

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

An approximation algorithm for fully testable kEP-SOP networks.

[BibT_eX]

[DOI]

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

Knitting for Fun: A Recursive Sweater.

[BibT_eX]

[DOI]

Chiara Bodei

Linda Pagli

Proceedings of the Fun with Algorithms, 4th International Conference, 2007

2006

Testability of SPP Three-Level Logic Networks in Static Fault Models.

[BibT_eX]

[DOI]

Rolf Drechsler

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Exploiting Regularities for Boolean Function Synthesis.

[BibT_eX]

[DOI]

Theory Comput. Syst., 2006

Logic Synthesis of EXOR Projected Sum of Products.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006

EXOR Projected Sum of Products.

[BibT_eX]

[DOI]

Proceedings of the IFIP VLSI-SoC 2006, 2006

DRedSOP: Synthesis of a New Class of Regular Functions.

[BibT_eX]

[DOI]

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Efficient minimization of fully testable 2-SPP networks.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2004

Spectral Analysis of Symmetric Threshold Functions.

[BibT_eX]

[DOI]

J. Multiple Valued Log. Soft Comput., 2004

Room allocation: a polynomial subcase of the quadratic assignment problem.

[BibT_eX]

[DOI]

Nadia Pisanti

Discret. Appl. Math., 2004

2003

Three-level logic minimization based on function regularities.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Complexity of some arithmetic problems for binary polynomials.

[BibT_eX]

[DOI]

Eric Allender

Joachim von zur Gathen

Michael E. Saks

Comput. Complex., 2003

Stuck-At-Fault Testability of SPP Three-Level Logic Forms.

[BibT_eX]

[DOI]

Rolf Drechsler

Proceedings of the VLSI-SOC: From Systems to Chips, 2003

Testability of SPP Three-Level Logic Networks.

[BibT_eX]

Rolf Drechsler

Proceedings of the IFIP VLSI-SoC 2003, 2003

2002

Implicit Test of Regularity for Not Completely Specified Boolean Functions.

[BibT_eX]

Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Fast three-level logic minimization based on autosymmetry.

[BibT_eX]

[DOI]

Proceedings of the 39th Design Automation Conference, 2002

2001

A Characterization of Bent Functions in Terms of Strongly Regular Graphs.

[BibT_eX]

[DOI]

Jeffrey M. Vanderkam

IEEE Trans. Computers, 2001

Circuit and Decision Tree Complexity of Some Number Theoretic Problems.

[BibT_eX]

[DOI]

Inf. Comput., 2001

On a hierarchy of Boolean functions hard to compute in constant depth.

[BibT_eX]

[DOI]

Discret. Math. Theor. Comput. Sci., 2001

2000

The average sensitivity of square-freeness.

[BibT_eX]

[DOI]

Comput. Complex., 2000

1999

Spectral Analysis of Boolean Functions as a Graph Eigenvalue Problem.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1999

On the Complexity of Balanced Boolean Functions.

[BibT_eX]

[DOI]

Inf. Process. Lett., 1999

A Note on the Polynomial Representation of Boolean Functions over GF(2).

[BibT_eX]

[DOI]

Richard Beigel

Int. J. Found. Comput. Sci., 1999

Hilbert Function and Complexity Lower Bounds for Symmetric Boolean Functions.

[BibT_eX]

[DOI]

Lavinia Egidi

Inf. Comput., 1999

On the Average Sensitivity of Testing Square-Free Numbers.

[BibT_eX]

[DOI]

Proceedings of the Computing and Combinatorics, 5th Annual International Conference, 1999

1998

Circuit Complexity of Testing Square-Free Numbers

[BibT_eX]

[DOI]

Electron. Colloquium Comput. Complex., 1998

Combinatorial Properties of Classes of Functions Hard to Compute in Constant Depth.

[BibT_eX]

[DOI]

Proceedings of the Computing and Combinatorics, 4th Annual International Conference, 1998

1997

Computing Groebner Bases in the Boolean Setting with Applications to Counting.

[BibT_eX]

Proceedings of the Workshop on Algorithm Engineering, 1997

1996

Sensitivity vs. Block Sensitivity (an Average-Case Study).

[BibT_eX]

[DOI]

Inf. Process. Lett., 1996

1994

Measures of Boolean Function Complexity Based on Harmonic Analysis.

[BibT_eX]

[DOI]